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path: root/src/host/trxcon/sched_lchan_xcch.c
AgeCommit message (Expand)AuthorFilesLines
2018-03-02host/trxcon: use integer math for ToA (Timing of Arrival)Vadim Yanitskiy1-3/+3
2018-01-05trxcon/scheduler: drop meaningless TODO commentVadim Yanitskiy1-1/+0
2017-12-18trxcon/scheduler: preprocess UL bursts before sendingVadim Yanitskiy1-4/+2
2017-12-18trxcon/scheduler: move prim management outside lchan handlersVadim Yanitskiy1-23/+9
2017-12-16host/trxcon/scheduler: always print error messagesVadim Yanitskiy1-2/+2
2017-12-16host/trxcon/scheduler: inform L2&3 about decoding errorsVadim Yanitskiy1-2/+2
2017-12-16host/trxcon/scheduler: use GSM_MACBLOCK_LEN definitionVadim Yanitskiy1-3/+4
2017-12-16host/trxcon/scheduler: drop meaningless memset callVadim Yanitskiy1-3/+1
2017-12-16host/trxcon/scheduler: clean up the trx_lchan_stateVadim Yanitskiy1-17/+10
2017-11-19host/trxcon/scheduler: separate logging of data messagesVadim Yanitskiy1-6/+6
2017-11-19host/trxcon/scheduler: share common declarations of lchan handlersVadim Yanitskiy1-10/+1
2017-11-19host/trxcon/l1ctl.c: include DL frame info in L1CTL_DATA_CONFVadim Yanitskiy1-1/+4
2017-11-19host/trxcon/l1ctl.c: don't fill l1ctl_info_ul into a primitiveVadim Yanitskiy1-3/+1
2017-11-19host/trxcon/scheduler: send stored tx_power to transceiverVadim Yanitskiy1-1/+1
2017-11-19host/trxcon/scheduler: clean up some includesVadim Yanitskiy1-4/+0
2017-11-19host/trxcon/scheduler: share common code for lchan handlersVadim Yanitskiy1-59/+7
2017-11-19host/trxcon/l1ctl.c: make l1ctl_tx_data_ind flexibleVadim Yanitskiy1-1/+1
2017-11-19host/trxcon/scheduler: get rid of useless nbits argumentVadim Yanitskiy1-6/+2
2017-11-19host/trxcon/scheduler: pass trx_lchan_state to lchan handlersVadim Yanitskiy1-22/+14
2017-11-19host/trxcon/scheduler: ignore incomplete sets of burstsVadim Yanitskiy1-7/+1
2017-11-19host/trxcon: split sched_lchan_handlers.cVadim Yanitskiy1-0/+304
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