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2019-07-16trx_toolkit/gsm_shared.py: introduce a new enum TrainingSeqGMSKVadim Yanitskiy1-1/+78
Training Sequences are defined in 3GPP TS 45.002, and used by the transceiver for detecting bursts. This change introduces an enum with training sequences for GMSK for Access and Normal bursts. This enumeration is needed for the follow-up changes that implement TRXD header version 1 support, and can now be used by RandBurstGen. Change-Id: If3bf102019ef53d6ee9ad230ef98bb45845b5af5
2019-07-11target_dsp/bin2cfile.py: make it compatible with python3Alexander Couzens1-2/+2
Change-Id: I2659c2e4633bd120cc6cd76942eff5b66d2057bb
2019-07-11firmware/solve_envs.py: make it compatible with python3Alexander Couzens1-1/+1
Change-Id: I711df515012f5542de5e5008c8fe4e601609759e
2019-07-10contrib/jenkins.sh: run "make maintainer-clean"Oliver Smith1-0/+6
Related: OS#3047 Change-Id: I11c37f72b6e4294d1dc7b6d1751627ccf4f5c87a
2019-07-02trx_toolkit/data_msg.py: legacy flag is only for version 0x00Vadim Yanitskiy1-1/+1
Since version 0x01, the burst bits are encoded as L16V, so appending two dummy octets doesn't make sense. Change-Id: I4d6c0bf54649d636ea6cb3fa2f37486b6619d5b3
2019-07-02trx_toolkit/data_msg.py: introduce header coding version 0x01Vadim Yanitskiy1-33/+362
The new version adds the following fields to the TRX2L1 message, keeping the L12TRX message unchanged: +------+-----+-----+-----+--------------------+ | RSSI | ToA | MTS | C/I | soft-bits (254..0) | +------+-----+-----+-----+--------------------+ - MTS (1 octet) - Modulation and Training Sequence info, and - C/I (2 octets) - Carrier-to-Interference ratio (big endian). == Coding of MTS: Modulation and Training Sequence info 3GPP TS 45.002 version 15.1.0 defines several modulation types, and a few sets of training sequences for each type. The most common are GMSK and 8-PSK (which is used in EDGE). +-----------------+---------------------------------------+ | 7 6 5 4 3 2 1 0 | bit numbers (value range) | +-----------------+---------------------------------------+ | . . . . . X X X | Training Sequence Code (0..7) | +-----------------+---------------------------------------+ | . X X X X . . . | Modulation, TS set number (see below) | +-----------------+---------------------------------------+ | X . . . . . . . | IDLE / nope frame indication (0 or 1) | +-----------------+---------------------------------------+ The bit number 7 (MSB) is set to high when either nothing has been detected, or during IDLE frames, so we can deliver noise levels, and avoid clock gaps on the L1 side. Other bits are ignored, and should be set to low (0) in this case. == Coding of modulation and TS set number GMSK has 4 sets of training sequences (see tables 5.2.3a-d), while 8-PSK (see tables 5.2.3f-g) and the others have 2 sets. Access and Synchronization bursts also have several synch. sequences. +-----------------+---------------------------------------+ | 7 6 5 4 3 2 1 0 | bit numbers (value range) | +-----------------+---------------------------------------+ | . 0 0 X X . . . | GMSK, 4 TS sets (0..3) | +-----------------+---------------------------------------+ | . 0 1 0 X . . . | 8-PSK, 2 TS sets (0..1) | +-----------------+---------------------------------------+ | . 0 1 1 X . . . | AQPSK, 2 TS sets (0..1) | +-----------------+---------------------------------------+ | . 1 0 0 X . . . | 16QAM, 2 TS sets (0..1) | +-----------------+---------------------------------------+ | . 1 0 1 X . . . | 32QAM, 2 TS sets (0..1) | +-----------------+---------------------------------------+ | . 1 1 1 X . . . | RESERVED (0) | +-----------------+---------------------------------------+ == C/I: Carrier-to-Interference ratio The C/I value is computed from the training sequence of each burst, where we can compare the "ideal" training sequence with the actual training sequence, and then express that difference in centiBels. Change-Id: Ie810c5a482d1c908994e8cdd32a2ea641ae7cedd Related: OS#4006, OS#1855
2019-07-01trx_toolkit/data_msg.py: implement header version codingVadim Yanitskiy1-15/+115
It may be necessary to extend the message specific header with more information. Since this is not a TLV-based protocol, we need to include the header format version. +-----------------+------------------------+ | 7 6 5 4 3 2 1 0 | bit numbers | +-----------------+------------------------+ | X X X X . . . . | header version (0..15) | +-----------------+------------------------+ | . . . . . X X X | TDMA TN (0..7) | +-----------------+------------------------+ | . . . . X . . . | RESERVED (0) | +-----------------+------------------------+ Instead of prepending an additional byte, it was decided to use 4 MSB bits of the first octet, which used to be zero-initialized due to the value range of TDMA TN. Therefore, the current header format has implicit version 0x00. Otherwise Wireshark (or trx_sniff.py) would need to guess the header version, or alternatively follow the control channel looking for the version setting command. The reserved bit number 3 can be used in the future to extend the TDMA TN range to (0..15), in case anybody would need to transfer UMTS bursts. Change-Id: Idb0377d66290eb9c15d6998a5806a84fa2e5dd02 Related: OS#4006
2019-07-01trx_toolkit/data_msg.py: add burst randomization helpersVadim Yanitskiy1-18/+30
Change-Id: Idf1393d3d1f04e6c60b356b797a18e6f77b23554
2019-07-01trx_toolkit/data_msg.py: mark bit conversion methods as @staticmethodVadim Yanitskiy1-10/+14
Change-Id: I2f9fdd514908f186b1c6c043ee9b31c27a396900
2019-06-30trxcon/scheduer: fix: properly check rc of gsm0503_pdtch_encode()Vadim Yanitskiy1-1/+1
The gsm0503_pdtch_encode() returns negative number on error, and the amount of encoded bits in case of success. Change-Id: I7d75141142922909330c5e86be8734bb06cd57a4
2019-06-30trxcon/scheduler: enrich GSM 05.03 encoding error messagesVadim Yanitskiy5-6/+16
Change-Id: I35a7c5df4fc0ed2195ba721f92812874011459d9
2019-06-24trx_toolkit/data_msg.py: add basic class documentationVadim Yanitskiy1-0/+79
Change-Id: I538bc96e5e24d3b7e344e4dbe2877bf60c13c720 Related# OS#4006
2019-06-24trx_toolkit/data_msg.py: inline both gen_fn() and parse_fn()Vadim Yanitskiy1-14/+3
Both functions are never used outside of both gen_msg() and parse_msg(). AFAIR, they were more complicated until we started to use struct, but now they can be easily inlined. Change-Id: Ie64b271cf502f3df23b32f4b14a1e2b551a0f794
2019-06-24trx_toolkit/data_msg.py: drop double field initializationVadim Yanitskiy1-5/+0
Those fields are being initialized by __init__(). Change-Id: Ibf71be552a7eb5dab1d096421a8557514294683e
2019-06-24trx_toolkit/data_msg.py: tests: use random reference dataVadim Yanitskiy1-27/+14
Having fn = 1024 and tn = 0 in all tests decreases the chances to spot encoding / decoding bugs of higher or lower values. Let's randomize the reference data before all the tests. Change-Id: Id3c5be9faaf0bef727b975c7182098af0cec6e71
2019-06-24trxcon/scheduler: fix bit shift in BSIC / TDMA FN calculationEric Wild1-1/+1
Ubsan is unhappy about shifts into the sign bit of our implicitly promoted value. Change-Id: I4e72db1143a68064ba83668414dc3d60c0e1ad78
2019-06-02trxcon/l1ctl.c: properly handle handover RACH requestVadim Yanitskiy3-15/+20
During the handover the MS needs to release the existing dedicated channel(s), establish the new one(s) as indicated by the network, and then, depending on the synchronisation state, send one or more HANDOVER ACCESS messages carried by Access Bursts. In order to implement this, trxcon needs to be able to transmit Access Bursts on any TDMA timeslot regardless of the logical channel type and the associated handler, i.e. != TRXC_RACH. The controlling side on L1CTL (layer23 or TTCN-3) needs to send one or more L1CTL_RACH_REQ message(s) with properly populated UL info header. Otherwise a regular RACH on TS0 is assumed. Change-Id: Ia967820a536c99966ba2c60b63d2ea9edb093f46
2019-06-02trxcon/scheduler: fix: do not ignore SACCH prims with odd lengthVadim Yanitskiy1-4/+4
Before this patch, prim_dequeue_sacch() used to ignore SACCH primitives with odd length (e.g. 21, when sender forgot to push 2 octets of L1 SACCH header), so neither they were transmitted, nor rejected. As a result, they would stay in the Tx queue until a dedicated connection is released. The only way to notice such problem was looking at the constantly growing talloc's report. Instead of ignoring the primitives with odd length and keeping them in the queue, let's pass them to a logical channel handler, so they would be dequeued and rejected with a proper logging event. Also, to simplify further debugging, let's print the final decision of SACCH prioritization: whether it's a Measurement Report or not. Change-Id: I3149fa518439470b397953306209eb859c83450a
2019-06-01trx_toolkit/data_msg.py: fix: extend RSSI value range to [-47..-120]Vadim Yanitskiy1-1/+3
Change-Id: I9fce3462db14bd273a1498762cc9293fc888b45a
2019-05-31trxcon/sched_mframe.c: mark all stolen CBCH UL slots as TRXC_IDLEVadim Yanitskiy1-4/+4
According to 3GPP TS 05.02, section 6.4.1, CBCH replaces SDCCH number 2 in both V (BCCH+CCCH+SDCCH/4+SACCH/4) and VII (SDCCH/8+SACCH/8) logical channel combinations. Unfortunately it is not clear whether we can use stolen UL slots for RACH or not. For now, we should mark all of them as IDLE. Somehow TRXC_SDCCH4_2 slots were left in the definition of combination V (combined CCCH+BCCH). This is not critical, but may be looking confusing. Let's fix this. Change-Id: Id30f2fac3274de3edff4ae59f77d9c9cf8059155
2019-05-31trxcon/trx_if.c: Dropping UL bursts is a noticeable eventHarald Welte1-2/+3
Therefore we should use LOGL_ERROR instead of LOGL_DEBUG. Change-Id: If5084feb9e847d212530b1a5985390405d91008b
2019-05-31trxcon: Suppress POWERON to TRX if we're already powered on.Harald Welte3-3/+18
The existing logic unconditionally wants to send a POWERON command on TRXC whenever L1CTL_FBSB_REQ is received. That may cause some problems when sending subsequent L1CTL_FBSB_REQ, e.g. due to signal loss. Sending POWEROFF when transceiver is not powered on is normal though. This can happen if trxcon is restarted while fake_trx was running. The existing FSM state could unfortunately not been used, as it's a mixture between the TRX connection state and the command/response state. The current solution is just a work around. We definitely need to introduce separate state machines for transceiver and its TRXC interface. Change-Id: I834e8897b95a2490811319697fc7cab6076db480
2019-05-30trxcon/scheduler: move PRIM_IS[_EXT]_RACH macros to sched_trx.hVadim Yanitskiy2-9/+13
Both PRIM_IS_RACH() and PRIM_IS_EXT_RACH() macros to be used for handover RACH detection in the follow up changes, thus we need have them widely available. Let's also give them better names: PRIM_IS_EXT_RACH -> PRIM_IS_RACH11 PRIM_IS_RACH -> PRIM_IS_RACH8 and introduce a new generic one for checking whether a given primitive is RACH in general (either 8-bit or 11-bit) or not. Change-Id: Ibc39c57fda000647be1829786f6423dcf3f435cd
2019-05-29trxcon/l1ctl.c: on L1CTL_DM_EST_REQ, determine pchan_config firstVadim Yanitskiy1-8/+8
It makes sense to do this first, before tuning to a different ARFCN and changing the training sequence. Otherwise, if no multi-frame configuration is found, trxcon would switch to a different channel and then remain inactive there. Change-Id: I274588ce3a9c49372b5da0629930afece46f799c
2019-05-28trxcon/l1ctl.c: use #define for RSL_CHAN_RACHVadim Yanitskiy1-1/+2
Change-Id: Ifdb1703217c7540344cf6772efe812c8a786a0c2
2019-05-28trxcon/sched_mframe.c: do not hard-code lchan combinationsVadim Yanitskiy1-19/+82
Having magic pre-calculated hex-masks gives one quite high chances to shoot oneself in the foot, and decreases readability in general. Let's do this pre-calculation during the compilation process, so it's much easier to read, extend and spot potential bugs. Change-Id: If945b3654e35c83fc0220fdd6d99c1c7a0503386
2019-05-28trxcon/sched_lchan_desc.c: fix missing TRX_CH_FLAG_AUTO flagVadim Yanitskiy1-0/+1
In I2fc61e1cdca4690a34e2861b9ee3b7c64ea64843 I introduced a regression. TRXC_SDCCH4_CBCH should have TRX_CH_FLAG_AUTO, because it's a part of GSM_PCHAN_CCCH_SDCCH4_CBCH multi-frame layout. If the controlling side on the other end of the L1CTL link requests this particular multi-frame layout, CBCH channel is expected to be active. Change-Id: I3ed942106a03220417b5cb9176107af057120fbe
2019-05-28virt_phy: Fix typo in log messageHarald Welte1-1/+1
Change-Id: I9291957ef5d7033d46060d07f2aa0a3880612e1a
2019-05-28layer23: fix tons of compiler warnings, mostly OSMO_DEPRECATED relatedHarald Welte7-26/+36
Change-Id: I03918bd864c711b377a795186123c85bb6f4dc4a
2019-05-28trxcon/scheduler: refactor description of TRXC_* lchansVadim Yanitskiy2-249/+476
Let's avoid fancy alignment in the description of logical channels for the benefits of having better readability, the ability to add more comments and fields without making it look ugly. Also, let's get rid of field 'chan' of 'trx_lchan_desc' structure since it's not used anywhere, and not actually needed because the position of each lchan description is defined by its TRXC_* type. As a bonus, let's add a human readable description to each lchan definition, so it can be printed in the VTY some day. Change-Id: I2fc61e1cdca4690a34e2861b9ee3b7c64ea64843
2019-05-28trxcon/sched_trx.c: add missing branch for GSM_PCHAN_PDCHVadim Yanitskiy1-0/+2
PDCH channel support was introduced quite a while ago, but there was no way to activate it via L1CTL so far. Let's fix this. Change-Id: I3b66cab26108ab999a7fe969365ab57dc661399c
2019-05-28firmware/scheduler: Fix CBCH related RSL channel numbersVadim Yanitskiy2-10/+15
CBCH support in the firmware has been introduced almost at the same time it was implemented in trxcon, and the same mistake was made as described in Ia9a415628c659cbc2dd5dc65b875b7f935d6e211. Despite Calypso based PHY does not support PDCH (GPRS channels), let's avoid collisions and use the following cbits values: 0x19 / 0b11001 - MF_TASK_SDCCH4_CBCH on GSM_DCHAN_SDCCH_4_CBCH, 0x1a / 0b11010 - MF_TASK_SDCCH8_CBCH on GSM_DCHAN_SDCCH_8_CBCH. Change-Id: Ibb0f90695460e6ede12016c12a0cfdf9c74dfb24 Related: OS#4027
2019-05-27trxcon: Use RSL channel mode #defines from libosmogsmHarald Welte2-15/+17
Wherever possible, use #defines from libosmogsm as opposed to magic numbers. Using magic numbers in several places has the danger of different programs/repositories having different views on what those values mean. Change-Id: I7ab4958801b3422973b67ff0452b90afa8a3f501 Related: OS#4027 Depends: libosmocore Change-Id I93e557358cf1c1b622f77f906959df7ca6d5cb12
2019-05-27trxcon: Fix CBCH related RSL channel numbersHarald Welte2-4/+4
OsmoBTS, BSC and TTCN3 used cbits == 0x18 for dynamic PDCH, while trxcon wanted to use 0x18 for CBCH on SDCCH/4. Let's fix this and bring everyone in agreement. Related: OS#4027 Change-Id: Ia9a415628c659cbc2dd5dc65b875b7f935d6e211
2019-05-23common/sap_fsm.c: fix missing pointer dereferenceHarald Welte1-1/+1
sap_fsm.c: In function ‘sap_negotiate_msg_size’: sap_fsm.c:103:15: warning: passing argument 1 of ‘__bswap_16’ makes integer from pointer without a cast [-Wint-conversion]: size = ntohs((uint16_t *) param->value); ^~~~~~~~~~~~~~~~~~~~~~~~~ Change-Id: Ie58af6162c67ae377809b42daa897ca3f3d72af1
2019-05-22contrib/jenkins.sh: Build gprsdecode + laye23 with 'make distcheck'Harald Welte1-1/+10
Change-Id: I17c4dfb7bbfcf8da78d688939ee8c0b916cb6b1a
2019-05-22layer23: Fix 'make distcheck'Harald Welte6-6/+65
Change-Id: Ic48e240ee1484aaa793af23c62a24d2949900b86
2019-05-22bcch_scan: Fix compiler warning about undefined functionsHarald Welte3-1/+10
Change-Id: I435ef2032b9cefe844c37f395d9087be6af8934a
2019-05-17trx_toolkit/clck_gen.py: avoid logging \0-terminatorVadim Yanitskiy1-1/+1
Change-Id: I93da2e8ba9d3fda944b8171bc42e49063c925f9c
2019-05-14common/sim.c: add missing break to sim_apdu_resp()Vadim Yanitskiy1-0/+1
Change-Id: Id5c325ffcfea8175bc5d5499a0904c0984e00349 Fixes: OS#198542
2019-05-13firmware/Makefile: clarify toolchain configuration includeVadim Yanitskiy1-1/+1
Change-Id: I77ce68d5904ff623f10f6475309052666bab7742
2019-05-13firmware/Makefile.inc: fix sections with overlapping VMAHarald Welte2-4/+4
Starting from [1], not only LMA but also VMA areas are now checked for overlaps (see also [2]). This results into linking errors: arm-none-eabi-ld: section .text.exceptions VMA [000000000080001c,0000000000800037] overlaps section .compal.reservedram VMA [0000000000800000,00000000008000fe] arm-none-eabi-ld: section .text.exceptions VMA [000000000080001c,0000000000800037] overlaps section .compal.loader VMA [0000000000800000,00000000008000ff] Let's try to work around this. [1] https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=a87dd97a2098b7e18ff2574a4e81ae521ef7e6f2 [2] https://sourceware.org/bugzilla/show_bug.cgi?id=18452 Change-Id: I098ddd33aabd7ec27981e2f09d8582f167bb649b Fixes: OS#1917
2019-05-09trxcon/trx_if.c: use ssize_t for return value of read()Vadim Yanitskiy1-13/+14
Change-Id: I4a489be6fafcd057c3edc4f3d5f76d645899f884
2019-05-09trxcon/trx_if.c: print error message if read() call failsVadim Yanitskiy1-2/+6
Change-Id: If3aaa730c306e703d1d430a8920284aa592c999c
2019-05-09trxcon/trx_if.c: use read() call instead of recv()Vadim Yanitskiy1-2/+2
According to the man page of recv(), the only difference of this call from read() is the presence of flags. With a zero flags argument, recv() is generally equivalent to read(). Change-Id: I6d43bbf8d52c5fbb8ee0592b7d1c1dfd2dd1548e
2019-05-09trxcon/l1ctl.c: init DL info header in l1ctl_tx_rach_conf()Vadim Yanitskiy1-0/+2
Since we only set both ARFCN and TDMA frame number of the DL info header, other fields remain uninitialized. Let's memset() them. Change-Id: Ib39c333f1724fefa5d8bd8a2315b77a5612f7fa9
2019-05-09trxcon/l1ctl.c: pass band_arfcn to l1ctl_tx_rach_conf()Vadim Yanitskiy3-5/+6
This would allow to abstract both L1CTL and TRX interfaces from each other in the upcoming refactoring. Change-Id: I74a23c73b03bad822272b9cfe76c2501666912b7
2019-05-03mobile/gsm48_mm.c: use proper types for gsm48_rr_hdrVadim Yanitskiy1-5/+5
Change-Id: I29ed122b8956260b9f847cc0e3e81a28d6762632
2019-05-03mobile/gsm48_rr.h: mark gsm48_rr_hdr struct as packedVadim Yanitskiy1-1/+1
In both gsm48_mm.c and gsm48_rr.c we put / push 'gsm48_rr_hdr' structure into the message buffers, so then it's retrieved by the message receivers. The AddressSanitizer complains about unaligned pointer access and potentially unexpected behaviour. Change-Id: I8aa2c0074b405afd0e76044ef076b6819fe1083b
2019-05-03mobile/gsm322.c: fix heap-use-after-free in gsm322_unselect_cell()Vadim Yanitskiy1-0/+2
In gsm322_l1_signal(), if S_L1CTL_FBSB_ERR is received, we free stored System Information of the current cell, but cs->si may still point to it. Let's set it to NULL. Found with AddressSanitizer: DL1C ERROR l1ctl.c:96 FBSB RESP: result=255 DCS INFO gsm322.c:2995 Channel sync error, try again DCS INFO gsm322.c:467 Sync to ARFCN=860(DCS) rxlev=-106 DRR INFO gsm48_rr.c:665 MON: no cell info DRR INFO gsm48_rr.c:665 MON: no cell info DRR INFO gsm48_rr.c:665 MON: no cell info DRR INFO gsm48_rr.c:665 MON: no cell info DL1C ERROR l1ctl.c:96 FBSB RESP: result=255 DCS INFO gsm322.c:3008 Channel sync error. DCS DEBUG gsm322.c:3013 free sysinfo ARFCN=860(DCS) DCS INFO gsm322.c:3020 Unselect cell due to sync error! DCS INFO gsm322.c:509 Unselecting serving cell. ================================================================= ==6014==ERROR: AddressSanitizer: heap-use-after-free on address 0x61b0000000e6 at pc 0x00000050d6dd bp 0x7fff7f84aa60 sp 0x7fff7f84aa58 Change-Id: I9cc526c18d69695d810de98703579818408de011
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