diff options
| -rwxr-xr-x | src/target/fake_trx/clck_gen.py | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/target/fake_trx/clck_gen.py b/src/target/fake_trx/clck_gen.py index 1eb970a5..088155b7 100755 --- a/src/target/fake_trx/clck_gen.py +++ b/src/target/fake_trx/clck_gen.py @@ -51,6 +51,7 @@ class CLCKGen: def __init__(self, clck_links, clck_start = 0, ind_period = 102): self.clck_links = clck_links self.ind_period = ind_period + self.clck_start = clck_start self.clck_src = clck_start # Calculate counter time @@ -68,6 +69,9 @@ class CLCKGen: self.timer.cancel() self.timer = None + # Reset the clock source + self.clck_src = self.clck_start + def send_clck_ind(self): # Keep clock cycle if self.clck_src % self.GSM_SUPERFRAME >= 0: |