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-rw-r--r--src/target/firmware/apps/hello_world/main.c2
-rw-r--r--src/target/firmware/apps/l1test/main.c4
-rw-r--r--src/target/firmware/apps/layer1/main.c2
-rwxr-xr-xsrc/target/firmware/apps/simtest/main.c12
-rw-r--r--src/target/firmware/calypso/delay.c2
-rw-r--r--src/target/firmware/calypso/dsp.c12
-rw-r--r--src/target/firmware/calypso/i2c.c2
-rwxr-xr-xsrc/target/firmware/calypso/sim.c4
-rw-r--r--src/target/firmware/calypso/tpu.c2
-rw-r--r--src/target/firmware/calypso/uwire.c2
-rw-r--r--src/target/firmware/comm/sercomm.c6
-rw-r--r--src/target/firmware/include/calypso/tpu.h2
-rw-r--r--src/target/firmware/layer1/afc.c2
-rw-r--r--src/target/firmware/layer1/prim_rx_nb.c2
-rw-r--r--src/target/firmware/layer1/prim_tx_nb.c6
-rw-r--r--src/target/firmware/layer1/sched_gsmtime.c2
-rw-r--r--src/target/firmware/rf/trf6151.c4
17 files changed, 34 insertions, 34 deletions
diff --git a/src/target/firmware/apps/hello_world/main.c b/src/target/firmware/apps/hello_world/main.c
index 14b09b73..5e3ed85e 100644
--- a/src/target/firmware/apps/hello_world/main.c
+++ b/src/target/firmware/apps/hello_world/main.c
@@ -85,7 +85,7 @@ int main(void)
keypad_set_handler(&key_handler);
- /* Dump clock config aftee PLL set */
+ /* Dump clock config after PLL set */
calypso_clk_dump();
puts(hr);
diff --git a/src/target/firmware/apps/l1test/main.c b/src/target/firmware/apps/l1test/main.c
index a800161a..97bc5287 100644
--- a/src/target/firmware/apps/l1test/main.c
+++ b/src/target/firmware/apps/l1test/main.c
@@ -120,7 +120,7 @@ static void l1test_state_change(enum l1test_state new_state)
}
}
-/* completion call-back for the L1 Sync Pwer Measurement */
+/* completion call-back for the L1 Sync Power Measurement */
static void l1s_signal_cb(struct l1_signal *sig)
{
uint16_t i, next_arfcn;
@@ -176,7 +176,7 @@ int main(void)
keypad_set_handler(&key_handler);
- /* Dump clock config aftee PLL set */
+ /* Dump clock config after PLL set */
calypso_clk_dump();
puts(hr);
diff --git a/src/target/firmware/apps/layer1/main.c b/src/target/firmware/apps/layer1/main.c
index 393f69e2..d918145b 100644
--- a/src/target/firmware/apps/layer1/main.c
+++ b/src/target/firmware/apps/layer1/main.c
@@ -65,7 +65,7 @@ int main(void)
keypad_set_handler(&key_handler);
- /* Dump clock config aftee PLL set */
+ /* Dump clock config after PLL set */
calypso_clk_dump();
puts(hr);
diff --git a/src/target/firmware/apps/simtest/main.c b/src/target/firmware/apps/simtest/main.c
index f3fa89f3..47ea88fa 100755
--- a/src/target/firmware/apps/simtest/main.c
+++ b/src/target/firmware/apps/simtest/main.c
@@ -71,7 +71,7 @@ static void myHexdump(uint8_t *data, int len)
#define SIM_UPDATE_RECORD 0xDC /* Write record of a record based file */
#define SIM_SEEK 0xA2 /* Seek in a record based file */
#define SIM_INCREASE 0x32 /* Increase a record in a record based file */
-#define SIM_VERIFY_CHV 0x20 /* Authenicate with card (enter pin) */
+#define SIM_VERIFY_CHV 0x20 /* Authenticate with card (enter pin) */
#define SIM_CHANGE_CHV 0x24 /* Change pin */
#define SIM_DISABLE_CHV 0x26 /* Disable pin so that no authentication is needed anymore */
#define SIM_ENABLE_CHV 0x28 /* Enable pin, authentication is now needed again */
@@ -83,7 +83,7 @@ static void myHexdump(uint8_t *data, int len)
#define SIM_GET_RESPONSE 0xC0 /* Get the response of a command from the card */
/* File identifiers (filenames)
- The file identifiers are the standartized file identfiers mentiond in the
+ The file identifiers are the standardized file identifiers mentioned in the
GSM-11-11 specification. */
#define SIM_MF 0x3F00
#define SIM_EF_ICCID 0x2FE2
@@ -159,7 +159,7 @@ uint16_t sim_readbinary(uint8_t offset_high, uint8_t offset_low, uint8_t length,
-/* FIXME: We need proper calibrated delay loops at some point! */
+/* FIXME: We need properly calibrated delay loops at some point! */
void delay_us(unsigned int us)
{
volatile unsigned int i;
@@ -201,8 +201,8 @@ void do_sim_test(void)
puts("----------------SIMTEST----8<-----------------\n");
- /* Initalize Sim-Controller driver */
- puts("Initalizing driver:\n");
+ /* Initialize Sim-Controller driver */
+ puts("Initializing driver:\n");
calypso_sim_init();
/* Power up sim and display ATR */
@@ -288,7 +288,7 @@ int main(void)
keypad_set_handler(&key_handler);
- /* Dump clock config aftee PLL set */
+ /* Dump clock config after PLL set */
calypso_clk_dump();
puts(hr);
diff --git a/src/target/firmware/calypso/delay.c b/src/target/firmware/calypso/delay.c
index 09f0043d..443ca827 100644
--- a/src/target/firmware/calypso/delay.c
+++ b/src/target/firmware/calypso/delay.c
@@ -1,6 +1,6 @@
#include <delay.h>
-/* FIXME: We need proper calibrated delay loops at some point! */
+/* FIXME: We need properly calibrated delay loops at some point! */
void delay_us(unsigned int us)
{
volatile unsigned int i;
diff --git a/src/target/firmware/calypso/dsp.c b/src/target/firmware/calypso/dsp.c
index 0d9521f0..5de7ee69 100644
--- a/src/target/firmware/calypso/dsp.c
+++ b/src/target/firmware/calypso/dsp.c
@@ -48,10 +48,10 @@
#define API_SIZE 0x2000U /* in words */
-#define BASE_API_RAM 0xffd00000 /* Base address of API RAM form ARM point of view */
+#define BASE_API_RAM 0xffd00000 /* Base address of API RAM from ARM point of view */
#define DSP_BASE_API 0x0800 /* Base address of API RAM for DSP */
-#define DSP_BASE_API_MIRROR 0xe000 /* Base address of API RAM for DSP (API boot mirrot */
+#define DSP_BASE_API_MIRROR 0xe000 /* Base address of API RAM for DSP (API boot mirror) */
#define DSP_START 0x7000 /* DSP Start address */
/* Boot loader */
@@ -446,7 +446,7 @@ static void dsp_db_init(void)
void dsp_power_on(void)
{
- /* proabaly a good idea to initialize the whole API area to a know value */
+ /* probably a good idea to initialize the whole API area to a known value */
dsp_api_memset((uint16_t *)BASE_API_RAM, API_SIZE * 2); // size is in words
dsp_set_params((int16_t *)&dsp_params, sizeof(dsp_params)/2);
@@ -559,8 +559,8 @@ void dsp_load_tch_param(struct gsm_time *next_time,
a5fn1 = (uint16_t)next_time->t1;
dsp_api.db_w->d_fn = fn; /* Fn_sid & Fn_report */
- dsp_api.db_w->a_a5fn[0] = a5fn0; /* cyphering FN part 1 */
- dsp_api.db_w->a_a5fn[1] = a5fn1; /* cyphering FN part 2 */
+ dsp_api.db_w->a_a5fn[0] = a5fn0; /* ciphering FN part 1 */
+ dsp_api.db_w->a_a5fn[1] = a5fn1; /* ciphering FN part 2 */
dsp_api.db_w->d_ctrl_tch = d_ctrl_tch; /* Channel config. */
}
@@ -671,7 +671,7 @@ void dsp_dump(void)
dsp_upload_sections_api(dsp_dumpcode, DSP_BASE_API);
dsp_bl_start_at(DSP_DUMPCODE_START);
- /* our dump code actually simulates the boot loaded
+ /* our dump code actually simulates the boot loader
* but with added read commands */
dsp_bl_wait_ready();
diff --git a/src/target/firmware/calypso/i2c.c b/src/target/firmware/calypso/i2c.c
index 2231990b..344424de 100644
--- a/src/target/firmware/calypso/i2c.c
+++ b/src/target/firmware/calypso/i2c.c
@@ -72,7 +72,7 @@ int i2c_write(uint8_t chip, uint32_t addr, int alen, const uint8_t *buffer, int
writeb(chip & 0x3f, I2C_REG(DEVICE_REG));
writeb(addr & 0xff, I2C_REG(ADDRESS_REG));
- /* we have to tell the controler how many bits we'll put into the fifo ?!? */
+ /* we have to tell the controller how many bits we'll put into the fifo ?!? */
writeb(len-1, I2C_REG(CONF_FIFO_REG));
/* fill the FIFO */
diff --git a/src/target/firmware/calypso/sim.c b/src/target/firmware/calypso/sim.c
index 610f968f..a539cf8a 100755
--- a/src/target/firmware/calypso/sim.c
+++ b/src/target/firmware/calypso/sim.c
@@ -34,8 +34,8 @@ static int sim_tx_character_count = 0; /* How many bytes have been transmitted b
static int sim_tx_character_length = 0; /* How many bytes have to be transmitted by calypso_sim_transmit() */
static uint8_t *rx_buffer = 0; /* RX-Buffer that is issued by calypso_sim_receive() */
static uint8_t *tx_buffer = 0; /* TX-Buffer that is issued by calypso_sim_transmit() */
-volatile static int rxDoneFlag = 0; /* Used for rx syncronization instead of a semaphore in calypso_sim_receive() */
-volatile static int txDoneFlag = 0; /* Used for rx syncronization instead of a semaphore in calypso_sim_transmit() */
+volatile static int rxDoneFlag = 0; /* Used for rx synchronization instead of a semaphore in calypso_sim_receive() */
+volatile static int txDoneFlag = 0; /* Used for rx synchronization instead of a semaphore in calypso_sim_transmit() */
/* Display Register dump */
void calypso_sim_regdump(void)
diff --git a/src/target/firmware/calypso/tpu.c b/src/target/firmware/calypso/tpu.c
index ed7aea74..0b60292a 100644
--- a/src/target/firmware/calypso/tpu.c
+++ b/src/target/firmware/calypso/tpu.c
@@ -194,7 +194,7 @@ void tpu_enable(int active)
#endif
}
-/* Enable or Disable the clock of teh TPU Module */
+/* Enable or Disable the clock of the TPU Module */
void tpu_clk_enable(int active)
{
uint16_t reg = readw(TPU_REG(TPU_CTRL));
diff --git a/src/target/firmware/calypso/uwire.c b/src/target/firmware/calypso/uwire.c
index b79d9f38..ac8f15e4 100644
--- a/src/target/firmware/calypso/uwire.c
+++ b/src/target/firmware/calypso/uwire.c
@@ -90,7 +90,7 @@ int uwire_xfer(int cs, int bitlen, const void *dout, void *din)
if (cs < 0 || cs > 4)
return -1;
- /* FIXME uwire_init always select CS0 for now */
+ /* FIXME uwire_init always selects CS0 for now */
printd("uwire_xfer(dev_idx=%u, bitlen=%u\n", cs, bitlen);
diff --git a/src/target/firmware/comm/sercomm.c b/src/target/firmware/comm/sercomm.c
index c78b3623..0263f7d6 100644
--- a/src/target/firmware/comm/sercomm.c
+++ b/src/target/firmware/comm/sercomm.c
@@ -159,7 +159,7 @@ int sercomm_drv_pull(uint8_t *ch)
if (sercomm.tx.state == RX_ST_ESCAPE) {
/* we've already transmitted the ESCAPE octet,
- * we now need to trnsmit the escaped data */
+ * we now need to transmit the escaped data */
*ch = *sercomm.tx.next_char++;
sercomm.tx.state = RX_ST_DATA;
} else if (sercomm.tx.next_char >= sercomm.tx.msg->tail) {
@@ -199,7 +199,7 @@ int sercomm_register_rx_cb(uint8_t dlci, dlci_cb_t cb)
return 0;
}
-/* dispatch an incomnig message once it is completely received */
+/* dispatch an incoming message once it is completely received */
static void dispatch_rx_msg(uint8_t dlci, struct msgb *msg)
{
if (dlci >= ARRAY_SIZE(sercomm.rx.dlci_handler) ||
@@ -268,7 +268,7 @@ int sercomm_drv_rx_char(uint8_t ch)
ch ^= (1 << 5);
ptr = msgb_put(sercomm.rx.msg, 1);
*ptr = ch;
- /* transition back to nromal DATA state */
+ /* transition back to normal DATA state */
sercomm.rx.state = RX_ST_DATA;
break;
}
diff --git a/src/target/firmware/include/calypso/tpu.h b/src/target/firmware/include/calypso/tpu.h
index 2db95aa1..3b1b6007 100644
--- a/src/target/firmware/include/calypso/tpu.h
+++ b/src/target/firmware/include/calypso/tpu.h
@@ -10,7 +10,7 @@
void tpu_reset(int active);
/* Enable or Disable a new scenario loaded into the TPU */
void tpu_enable(int active);
-/* Enable or Disable the clock of teh TPU Module */
+/* Enable or Disable the clock of the TPU Module */
void tpu_clk_enable(int active);
/* Enable Frame Interrupt generation on next frame. DSP will reset it */
void tpu_dsp_frameirq_enable(void);
diff --git a/src/target/firmware/layer1/afc.c b/src/target/firmware/layer1/afc.c
index 3890972d..92545a7f 100644
--- a/src/target/firmware/layer1/afc.c
+++ b/src/target/firmware/layer1/afc.c
@@ -60,7 +60,7 @@ static struct afc_state afc_state = {
* DAC = 1MHz / 947MHz * FreqErr(Hz) / AFCslop(ppm/LSB)
* where:
* 947 MHz is the center of EGSM
- * AFCslope is coded F1.15, thus a normalization factor of 2^15 aplpies
+ * AFCslope is coded F1.15, thus a normalization factor of 2^15 applies
*/
#define AFC_NORM_FACTOR_GSM ((1<<15) / 947)
diff --git a/src/target/firmware/layer1/prim_rx_nb.c b/src/target/firmware/layer1/prim_rx_nb.c
index e3e808da..9edb081c 100644
--- a/src/target/firmware/layer1/prim_rx_nb.c
+++ b/src/target/firmware/layer1/prim_rx_nb.c
@@ -76,7 +76,7 @@ static int l1s_nb_resp(__unused uint8_t p1, uint8_t burst_id, uint16_t p3)
return 0;
}
- /* DSP burst ID needs to corespond with what we expect */
+ /* DSP burst ID needs to correspond with what we expect */
if (dsp_api.db_r->d_burst_d != burst_id) {
printf("BURST ID %u!=%u\n", dsp_api.db_r->d_burst_d, burst_id);
return 0;
diff --git a/src/target/firmware/layer1/prim_tx_nb.c b/src/target/firmware/layer1/prim_tx_nb.c
index ba4a59c7..4989bf56 100644
--- a/src/target/firmware/layer1/prim_tx_nb.c
+++ b/src/target/firmware/layer1/prim_tx_nb.c
@@ -54,7 +54,7 @@
static uint32_t last_txnb_fn;
-/* p1: type of operation (0: one NB, 1: one RACH burst, 2: four NB */
+/* p1: type of operation (0: one NB, 1: one RACH burst, 2: four NB) */
static int l1s_tx_resp(__unused uint8_t p1, __unused uint8_t burst_id,
__unused uint16_t p3)
{
@@ -70,7 +70,7 @@ static int l1s_tx_resp(__unused uint8_t p1, __unused uint8_t burst_id,
return 0;
}
-/* p1: type of operation (0: one NB, 1: one RACH burst, 2: four NB */
+/* p1: type of operation (0: one NB, 1: one RACH burst, 2: four NB) */
static int l1s_tx_cmd(uint8_t p1, uint8_t burst_id, uint16_t p3)
{
uint16_t arfcn;
@@ -144,7 +144,7 @@ void l1s_tx_test(uint8_t base_fn, uint8_t type)
if (type == 0) {// one normal burst
tdma_schedule(base_fn, &l1s_tx_cmd, 0, 0, 0, 3);
tdma_schedule(base_fn + 2, &l1s_tx_resp, 0, 0, 0, 3);
- } else if (type == 2) { // four normal burst
+ } else if (type == 2) { // four normal bursts
tdma_schedule(base_fn, &l1s_tx_cmd, 2, 0, 0, 3);
tdma_schedule(base_fn + 1, &l1s_tx_cmd, 2, 1, 0, 3);
tdma_schedule(base_fn + 2, &l1s_tx_resp, 2, 0, 0, 3);
diff --git a/src/target/firmware/layer1/sched_gsmtime.c b/src/target/firmware/layer1/sched_gsmtime.c
index 6a549e2d..ba3bac70 100644
--- a/src/target/firmware/layer1/sched_gsmtime.c
+++ b/src/target/firmware/layer1/sched_gsmtime.c
@@ -33,7 +33,7 @@ static struct sched_gsmtime_event sched_gsmtime_events[16];
static LLIST_HEAD(active_evts);
static LLIST_HEAD(inactive_evts);
-/* Scheduling of a tdma_sched_item list one-shot at a givnen GSM time */
+/* Scheduling of a tdma_sched_item list one-shot at a given GSM time */
int sched_gsmtime(const struct tdma_sched_item *si, uint32_t fn, uint16_t p3)
{
struct llist_head *lh;
diff --git a/src/target/firmware/rf/trf6151.c b/src/target/firmware/rf/trf6151.c
index b465611d..179f9f90 100644
--- a/src/target/firmware/rf/trf6151.c
+++ b/src/target/firmware/rf/trf6151.c
@@ -38,7 +38,7 @@
enum trf6151_reg {
REG_RX = 0, /* RF general settings */
REG_PLL = 1, /* PLL settings */
- REG_PWR = 2, /* Power on/off funcitonal blocks */
+ REG_PWR = 2, /* Power on/off functional blocks */
REG_CFG = 3, /* Transceiver and PA controller settings */
REG_TEST1 = 4,
REG_TEST2 = 5,
@@ -87,7 +87,7 @@ enum trf6151_reg {
#define PLL_VAL(a, b) ((a << 3) | (((b)-64) << 9))
-/* All values in qbits unless otherwise speciifed */
+/* All values in qbits unless otherwise specified */
#define TRF6151_LDO_DELAY_TS 6 /* six TDMA frames (at least 25ms) */
#define TRF6151_RX_PLL_DELAY 184 /* 170 us */
#define TRF6151_TX_PLL_DELAY 260 /* 240 us */