diff options
| author | Vadim Yanitskiy <axilirator@gmail.com> | 2018-10-01 17:38:27 +0700 |
|---|---|---|
| committer | Harald Welte <laforge@gnumonks.org> | 2018-10-03 08:37:11 +0000 |
| commit | a49b63ce5a0302d34fa1df4f76e59cd535ea1b9c (patch) | |
| tree | da31e9b180c25dd52f330cef867bbea914602d4a /src/target | |
| parent | d2807f4885f20642f52453d36ed48c292ba0a3cb (diff) | |
l1ctl_proto.h: extend ccch_mode enum with CBCH
According to GSM TS 05.02, there are two ways to enable CBCH:
a) replace sub-slot number 2 of CCCH+SDCCH/4 (comb. V),
b) replace sub-slot number 2 of SDCCH/8 (comb. VII).
Unlike SDCCH/8 (case b), CCCH+SDCCH/4 can be allocated on TS0
only, and shall not use frequency hopping. This means that
implementing CBCH support on SDCCH/8 would require much more
efforts than on combined CCCH+SDCCH/4, as in last case CBCH
messages can be received without the need to switch from
idle to dedicated mode.
This change introduces a new ccch_mode item, which should be
used by the higher layers to indicate presence of CBCH channel
on C0/TS0, so the PHY would enable decoding of CBCH messages
on CCCH+SDCCH/4 (case a) in idle mode.
Regarding to CBCH on SDCCH/8 (case b), it makes sense to
extend the 'l1ctl_dm_est_req', so it would be handled in
dedicated mode on request from the higher layers.
Change-Id: Ia94ebf22a2ec439dfe1f31d703b832ae57b48ef2
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/firmware/layer1/l23_api.c | 4 | ||||
| -rw-r--r-- | src/target/firmware/layer1/prim_fbsb.c | 4 |
2 files changed, 8 insertions, 0 deletions
diff --git a/src/target/firmware/layer1/l23_api.c b/src/target/firmware/layer1/l23_api.c index 404a2f98..daffaf8b 100644 --- a/src/target/firmware/layer1/l23_api.c +++ b/src/target/firmware/layer1/l23_api.c @@ -489,6 +489,10 @@ static void l1ctl_rx_ccch_mode_req(struct msgb *msg) mframe_enable(MF_TASK_CCCH_COMB); else if (ccch_mode == CCCH_MODE_NON_COMBINED) mframe_enable(MF_TASK_CCCH); + else if (ccch_mode == CCCH_MODE_COMBINED_CBCH) { + mframe_enable(MF_TASK_CCCH_COMB); + mframe_enable(MF_TASK_SDCCH4_CBCH); + } l1ctl_tx_ccch_mode_conf(ccch_mode); } diff --git a/src/target/firmware/layer1/prim_fbsb.c b/src/target/firmware/layer1/prim_fbsb.c index 9eb56c69..50acefcc 100644 --- a/src/target/firmware/layer1/prim_fbsb.c +++ b/src/target/firmware/layer1/prim_fbsb.c @@ -262,6 +262,10 @@ static int l1s_sbdet_resp(__unused uint8_t p1, uint8_t attempt, mframe_enable(MF_TASK_CCCH_COMB); else if (l1s.serving_cell.ccch_mode == CCCH_MODE_NON_COMBINED) mframe_enable(MF_TASK_CCCH); + else if (l1s.serving_cell.ccch_mode == CCCH_MODE_COMBINED_CBCH) { + mframe_enable(MF_TASK_CCCH_COMB); + mframe_enable(MF_TASK_SDCCH4_CBCH); + } l1s_compl_sched(L1_COMPL_FB); |