summaryrefslogtreecommitdiffstats
path: root/src/target/firmware/calypso/backlight.c
diff options
context:
space:
mode:
authorHarald Welte <laforge@gnumonks.org>2010-02-18 16:46:36 +0100
committerHarald Welte <laforge@gnumonks.org>2010-02-18 16:46:36 +0100
commitfbe7b94c9c65f2df74acd5dff7503c9833ec2579 (patch)
tree5f47a597f2f396662719c5a76ac6bf26eda69f6c /src/target/firmware/calypso/backlight.c
Initial import of OsmocomBB into git repository
Diffstat (limited to 'src/target/firmware/calypso/backlight.c')
-rw-r--r--src/target/firmware/calypso/backlight.c67
1 files changed, 67 insertions, 0 deletions
diff --git a/src/target/firmware/calypso/backlight.c b/src/target/firmware/calypso/backlight.c
new file mode 100644
index 00000000..e2ff29cc
--- /dev/null
+++ b/src/target/firmware/calypso/backlight.c
@@ -0,0 +1,67 @@
+/* Calypso DBB internal PWL (Pulse Width / Light) Driver */
+
+/* (C) 2010 by Harald Welte <laforge@gnumonks.org>
+ *
+ * All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+
+#include <stdint.h>
+#include <memory.h>
+
+#define BASE_ADDR_PWL 0xfffe8000
+#define PWL_REG(m) (BASE_ADDR_PWL + (m))
+
+#define ASIC_CONF_REG 0xfffef008
+#define LIGHT_LEVEL_REG 0xfffe4810
+
+enum pwl_reg {
+ PWL_LEVEL = 0,
+ PWL_CTRL = 2,
+};
+
+#define ASCONF_PWL_ENA (1 << 4)
+
+void bl_mode_pwl(int on)
+{
+ uint16_t reg;
+
+ reg = readw(ASIC_CONF_REG);
+
+ if (on) {
+ writeb(0x01, PWL_REG(PWL_CTRL));
+ /* Switch pin from LT to PWL */
+ reg |= ASCONF_PWL_ENA;
+ writew(reg, ASIC_CONF_REG);
+ } else {
+ /* Switch pin from PWL to LT */
+ reg |= ~ASCONF_PWL_ENA;
+ writew(reg, ASIC_CONF_REG);
+ writeb(0x00, PWL_REG(PWL_CTRL));
+ }
+}
+
+void bl_level(uint8_t level)
+{
+ if (readw(ASIC_CONF_REG) & ASCONF_PWL_ENA) {
+ writeb(level, PWL_REG(PWL_LEVEL));
+ } else {
+ /* we need to scale the light level, as the
+ * ARMIO light controller only knows 0..63 */
+ writeb(level>>2, LIGHT_LEVEL_REG);
+ }
+}