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authorVadim Yanitskiy <axilirator@gmail.com>2017-07-16 17:15:56 +0700
committerVadim Yanitskiy <axilirator@gmail.com>2017-10-23 22:05:49 +0330
commitd961073b09e2ce6122c7b09166fef9413c62f2af (patch)
tree5f24bb55bb631224bc4c30d047dc6274c21e536b
parentf1a93f730f8872dfaf24435e830604f0400891ff (diff)
host/trxcon/scheduler: add a reference to GSM 05.02
-rw-r--r--src/host/trxcon/sched_lchan_handlers.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/host/trxcon/sched_lchan_handlers.c b/src/host/trxcon/sched_lchan_handlers.c
index 1c7a313..fcc4e71 100644
--- a/src/host/trxcon/sched_lchan_handlers.c
+++ b/src/host/trxcon/sched_lchan_handlers.c
@@ -395,7 +395,10 @@ int rx_sch_fn(struct trx_instance *trx, struct trx_ts *ts,
return 0;
}
-/* 41-bit RACH synchronization sequence */
+/**
+ * 41-bit RACH synchronization sequence
+ * GSM 05.02 Chapter 5.2.7 Access burst (AB)
+ */
static ubit_t rach_synch_seq[] = {
0, 1, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1,
1, 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0,