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authorVadim Yanitskiy <axilirator@gmail.com>2017-07-14 09:01:30 +0700
committerVadim Yanitskiy <axilirator@gmail.com>2017-10-23 22:05:49 +0330
commitc8c62c18e39faec573d8aaf5525965392a162548 (patch)
tree2de20daf112a6bf6e7cbd3c26e13a4efaca00b6a
parent03f13c610947333d46ec0206ff45c8d85508f759 (diff)
fake_trx: handle SETSLOT command from BB
-rw-r--r--src/target/fake_trx/burst_fwd.py4
-rw-r--r--src/target/fake_trx/ctrl_if_bb.py25
-rwxr-xr-xsrc/target/fake_trx/fake_trx.py1
3 files changed, 28 insertions, 2 deletions
diff --git a/src/target/fake_trx/burst_fwd.py b/src/target/fake_trx/burst_fwd.py
index 161710c..1ac74c0 100644
--- a/src/target/fake_trx/burst_fwd.py
+++ b/src/target/fake_trx/burst_fwd.py
@@ -23,8 +23,8 @@
# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
class BurstForwarder:
- # Timeslot filter
- ts_pass = 0
+ # Timeslot filter (drop everything by default)
+ ts_pass = None
def __init__(self, bts_link, bb_link):
self.bts_link = bts_link
diff --git a/src/target/fake_trx/ctrl_if_bb.py b/src/target/fake_trx/ctrl_if_bb.py
index f840c09..3882b6a 100644
--- a/src/target/fake_trx/ctrl_if_bb.py
+++ b/src/target/fake_trx/ctrl_if_bb.py
@@ -27,6 +27,7 @@ from ctrl_if import CTRLInterface
class CTRLInterfaceBB(CTRLInterface):
# Internal state variables
trx_started = False
+ burst_fwd = None
rx_freq = None
tx_freq = None
pm = None
@@ -93,6 +94,30 @@ class CTRLInterfaceBB(CTRLInterface):
return (0, [meas_dbm])
+ elif self.verify_cmd(request, "SETSLOT", 2):
+ print("[i] Recv SETSLOT cmd")
+
+ if self.burst_fwd is None:
+ return -1
+
+ # Obtain TS index
+ ts = int(request[1])
+ if ts not in range(0, 8):
+ print("[!] TS index should be in range: 0..7")
+ return -1
+
+ # Parse TS type
+ ts_type = int(request[2])
+
+ # TS activation / deactivation
+ # We don't care about ts_type
+ if ts_type == 0:
+ self.burst_fwd.ts_pass = None
+ else:
+ self.burst_fwd.ts_pass = ts
+
+ return 0
+
# Wrong / unknown command
else:
# We don't care about other commands,
diff --git a/src/target/fake_trx/fake_trx.py b/src/target/fake_trx/fake_trx.py
index 724a520..533b264 100755
--- a/src/target/fake_trx/fake_trx.py
+++ b/src/target/fake_trx/fake_trx.py
@@ -80,6 +80,7 @@ class Application:
self.bb_data = UDPLink(self.bb_addr,
self.bb_base_port + 102, self.bb_base_port + 2)
self.burst_fwd = BurstForwarder(self.bts_data, self.bb_data)
+ self.bb_ctrl.burst_fwd = self.burst_fwd
# Share clock between BTS and BB
self.bts_clck = UDPLink(self.bts_addr,