firmware: Add support for the Pirelli DP-L10 triband GSM/Wifi phone

Signed-off-by: Steve Markgraf <steve@steve-m.de>

4 files changed, 316 insertions, 1 deletions

diff --git a/src/target/firmware/Makefile b/src/target/firmware/Makefile
index 20547763..ad46fb54 100644
--- a/src/target/firmware/Makefile
+++ b/src/target/firmware/Makefile
@@ -1,7 +1,7 @@
 
 
 # List of all supported boards (meant to be overridden on command line)
-BOARDS?=compal_e88 compal_e86 compal_e99 gta0x
+BOARDS?=compal_e88 compal_e86 compal_e99 gta0x pirelli_dpl10
 
 # List of all applications (meant to be overridden on command line)
 APPLICATIONS?=hello_world compal_dsp_dump layer1 loader simtest chainload
@@ -16,6 +16,11 @@ calypso_COMMON_OBJS=board/common/calypso_uart.o board/common/calypso_pwl.o
 gta0x_OBJS=$(calypso_COMMON_OBJS) board/gta0x/rffe_gta0x_triband.o board/gta0x/init.o board/gta0x/rf_power.o
 gta0x_ENVIRONMENTS=highram
 
+# Pirelli DP-L10
+
+pirelli_dpl10_OBJS=$(calypso_COMMON_OBJS) board/pirelli_dpl10/rffe_dpl10_triband.o board/pirelli_dpl10/init.o board/pirelli_dpl10/rf_power.o
+pirelli_dpl10_ENVIRONMENTS=highram
+
 # Compal Generic
 
 compal_COMMON_OBJS=$(calypso_COMMON_OBJS) board/compal/rffe_dualband.o board/compal/rf_power.o
diff --git a/src/target/firmware/board/pirelli_dpl10/init.c b/src/target/firmware/board/pirelli_dpl10/init.c
new file mode 100644
index 00000000..0ec11a1f
--- /dev/null
+++ b/src/target/firmware/board/pirelli_dpl10/init.c
@@ -0,0 +1,128 @@
+/* Initialization for the Pirelli DP-L10 */
+
+/* (C) 2010 by Harald Welte <laforge@gnumonks.org>
+ * (C) 2011 by Steve Markgraf <steve@steve-m.de>
+ *
+ * All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+
+#include <stdint.h>
+#include <stdio.h>
+
+#include <debug.h>
+#include <ctors.h>
+#include <memory.h>
+#include <board.h>
+#include <keypad.h>
+#include <console.h>
+#include <flash/cfi_flash.h>
+
+#include <calypso/irq.h>
+#include <calypso/clock.h>
+#include <calypso/dma.h>
+#include <calypso/rtc.h>
+#include <calypso/timer.h>
+#include <calypso/uart.h>
+#include <calypso/backlight.h>
+
+#include <comm/sercomm.h>
+#include <comm/timer.h>
+
+#include <abb/twl3025.h>
+#include <rf/trf6151.h>
+#include <display.h>
+
+#define ARMIO_LATCH_OUT 0xfffe4802
+#define ARMIO_CNTL_REG	0xfffe4804
+#define ASIC_CONF_REG	0xfffef008
+
+static void board_io_init(void)
+{
+	uint16_t reg;
+
+	reg = readw(ASIC_CONF_REG);
+	/* Set function pins to I2C Mode */
+	reg |= 0x1080;			/* SCL / SDA */
+	/* TWL3025: Set SPI+RIF RX clock to rising edge */
+	reg |= (1 << 13) | (1 << 14);
+	writew(reg, ASIC_CONF_REG);
+}
+
+void board_init(void)
+{
+	/* Configure the memory interface */
+	calypso_mem_cfg(CALYPSO_nCS0, 3, CALYPSO_MEM_16bit, 1);
+	calypso_mem_cfg(CALYPSO_nCS1, 3, CALYPSO_MEM_16bit, 1);
+	calypso_mem_cfg(CALYPSO_nCS2, 5, CALYPSO_MEM_16bit, 1);
+	calypso_mem_cfg(CALYPSO_nCS3, 5, CALYPSO_MEM_16bit, 1);
+	calypso_mem_cfg(CALYPSO_CS4, 0, CALYPSO_MEM_8bit, 1);
+	calypso_mem_cfg(CALYPSO_nCS6, 0, CALYPSO_MEM_32bit, 1);
+	calypso_mem_cfg(CALYPSO_nCS7, 0, CALYPSO_MEM_32bit, 0);
+
+	/* Set VTCXO_DIV2 = 1, configure PLL for 104 MHz and give ARM half of that */
+	calypso_clock_set(2, CALYPSO_PLL13_104_MHZ, ARM_MCLK_DIV_2);
+
+	/* Configure the RHEA bridge with some sane default values */
+	calypso_rhea_cfg(0, 0, 0xff, 0, 1, 0, 0);
+
+	/* Initialize board-specific GPIO */
+	board_io_init();
+
+	/* Enable bootrom mapping to route exception vectors to RAM */
+	calypso_bootrom(1);
+	calypso_exceptions_install();
+
+	/* Initialize interrupt controller */
+	irq_init();
+
+	/* initialize MODEM UART to be used for sercomm*/
+	uart_init(SERCOMM_UART_NR, 1);
+	uart_baudrate(SERCOMM_UART_NR, UART_115200);
+
+	/* Initialize IRDA UART to be used for old-school console code.
+	 * note: IRDA uart only accessible on C115 and C117 PCB */
+	uart_init(CONS_UART_NR, 1);
+	uart_baudrate(CONS_UART_NR, UART_115200);
+
+	/* Initialize hardware timers */
+	hwtimer_init();
+
+	/* Initialize DMA controller */
+	dma_init();
+
+	/* Initialize real time clock */
+	rtc_init();
+
+	/* Initialize system timers (uses hwtimer 2) */
+	timer_init();
+
+	/* Initialize LCD driver (uses I2C) and backlight */
+	display = &st7558_display;
+	display_init();
+	bl_mode_pwl(1);
+	bl_level(0);
+
+	/* Initialize keypad driver */
+	keypad_init(1);
+
+	/* Initialize ABB driver (uses SPI) */
+	twl3025_init();
+
+	/* enable LEDB driver of Iota for keypad backlight */
+	twl3025_reg_write(AUXLED, 0x02);
+}
diff --git a/src/target/firmware/board/pirelli_dpl10/rf_power.c b/src/target/firmware/board/pirelli_dpl10/rf_power.c
new file mode 100644
index 00000000..34e74097
--- /dev/null
+++ b/src/target/firmware/board/pirelli_dpl10/rf_power.c
@@ -0,0 +1,63 @@
+/* Tx RF power calibration for the Pirelli DP-L10 */
+
+/* (C) 2010 by Harald Welte <laforge@gnumonks.org>
+ *
+ * All Rights Reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ */
+
+#include <stdint.h>
+#include <osmocore/utils.h>
+
+/* GSM900 ARFCN 33, Measurements by Steve Markgraf / May 2010 */
+/* FIXME those are from the Compal phones, do measurements with the DP-L10 */
+const int16_t dbm2apc_gsm900[] = {
+	[0]     = 151,
+	[1]     = 152,
+	[2]     = 153,
+	[3]     = 155,
+	[4]     = 156,
+	[5]     = 158,
+	[6]     = 160,
+	[7]     = 162,
+	[8]     = 164,
+	[9]     = 167,
+	[10]    = 170,
+	[11]    = 173,
+	[12]    = 177,
+	[13]    = 182,
+	[14]    = 187,
+	[15]    = 192,
+	[16]    = 199,
+	[17]    = 206,
+	[18]    = 214,
+	[19]    = 223,
+	[20]    = 233,
+	[21]    = 244,
+	[22]    = 260,
+	[23]    = 271,
+	[24]    = 288,
+	[25]    = 307,
+	[26]    = 327,
+	[27]    = 350,
+	[28]    = 376,
+	[29]    = 407,
+	[30]    = 456,
+	[31]    = 575,
+};
+
+const int dbm2apc_gsm900_max = ARRAY_SIZE(dbm2apc_gsm900) - 1;
diff --git a/src/target/firmware/board/pirelli_dpl10/rffe_dpl10_triband.c b/src/target/firmware/board/pirelli_dpl10/rffe_dpl10_triband.c
new file mode 100644
index 00000000..8d249288
--- /dev/null
+++ b/src/target/firmware/board/pirelli_dpl10/rffe_dpl10_triband.c
@@ -0,0 +1,119 @@
+#include <stdint.h>
+#include <stdio.h>
+
+#include <debug.h>
+#include <memory.h>
+#include <rffe.h>
+#include <calypso/tsp.h>
+#include <rf/trf6151.h>
+
+/* This is a value that has been measured on the C123 by Harald: 71dBm,
+   it is the difference between the input level at the antenna and what
+   the DSP reports, subtracted by the total gain of the TRF6151 */
+#define SYSTEM_INHERENT_GAIN	71
+
+/* describe how the RF frontend is wired on the Pirelli DP-L10 */
+
+#define		RITA_RESET	TSPACT(5)	/* Reset of the Rita TRF6151 */
+#define		PA_ENABLE	TSPACT(0)	/* Enable the Power Amplifier */
+#define		GSM_TXEN	TSPACT(3)	/* PA GSM switch, low-active,
+						 * 1 for DCS1800/PCS1900 TX */
+
+/* All VCn controls are high-active */
+#define		ASM_VC1		TSPACT(4)	/* VC1 PCS1900 RX */
+#define		ASM_VC2		TSPACT(10)	/* VC2 DCS1800/PCS1900 TX */
+#define		ASM_VC3		TSPACT(11)	/* VC3 GSM900 TX */
+
+#define		IOTA_STROBE	TSPEN(0)	/* Strobe for the Iota TSP */
+#define		RITA_STROBE	TSPEN(1)	/* Strobe for the Rita TSP */
+
+/* switch RF Frontend Mode */
+void rffe_mode(enum gsm_band band, int tx)
+{
+	uint16_t tspact = tsp_act_state();
+
+	/* First we mask off all bits from the state cache */
+	tspact &= ~(PA_ENABLE| GSM_TXEN);
+	tspact &= ~(ASM_VC1 | ASM_VC2 | ASM_VC3);
+
+	switch (band) {
+	case GSM_BAND_850:
+	case GSM_BAND_900:
+	case GSM_BAND_1800:
+		break;
+	case GSM_BAND_1900:
+		tspact |= ASM_VC1;
+		break;
+	default:
+		/* TODO return/signal error here */
+		break;
+	}
+
+#ifdef CONFIG_TX_ENABLE
+	/* Then we selectively set the bits on, if required */
+	if (tx) {
+		switch (band) {
+		case GSM_BAND_850:
+		case GSM_BAND_900:
+			tspact |= ASM_VC3;
+			break;
+		case GSM_BAND_1800:
+		case GSM_BAND_1900:
+			tspact |= GSM_TXEN;
+			tspact |= ASM_VC2;
+			break;
+		default:
+			break;
+		}
+		tspact |= PA_ENABLE;
+	}
+#endif /* TRANSMIT_SUPPORT */
+
+	tsp_act_update(tspact);
+}
+
+#define MCU_SW_TRACE	0xfffef00e
+#define ARM_CONF_REG	0xfffef006
+#define ASIC_CONF_REG	0xfffef008
+
+void rffe_init(void)
+{
+	uint16_t reg;
+
+	reg = readw(ARM_CONF_REG);
+	reg &= ~ (1 << 7);	/* TSPACT4 I/O function, not nRDYMEM */
+	writew(reg, ARM_CONF_REG);
+
+	reg = readw(ASIC_CONF_REG);
+	reg &= ~ (1 << 15);	/* TSPACT5 I/O function, not DPLLCLK */
+	writew(reg, ASIC_CONF_REG);
+
+	reg = readw(MCU_SW_TRACE);
+	reg &= ~(1 << 3);	/* TSPACT10 I/O function, not nWAIT(1) */
+	reg &= ~(1 << 2);	/* TSPACT11 I/O function, not MCLK(1) */
+	writew(reg, MCU_SW_TRACE);
+
+	/* Configure the TSPEN which is connected to the TWL3025 */
+	tsp_setup(IOTA_STROBE, 1, 0, 0);
+
+	trf6151_init(RITA_STROBE, RITA_RESET);
+}
+
+uint8_t rffe_get_gain(void)
+{
+	return trf6151_get_gain();
+}
+
+const uint8_t system_inherent_gain = SYSTEM_INHERENT_GAIN;
+
+/* Given the expected input level of exp_inp dBm/8 and the target of target_bb
+ * dBm8, configure the RF Frontend with the respective gain */
+void rffe_set_gain(int16_t exp_inp, int16_t target_bb)
+{
+	trf6151_compute_gain(exp_inp, target_bb);
+}
+
+void rffe_rx_win_ctrl(int16_t exp_inp, int16_t target_bb)
+{
+	/* FIXME */
+}