diff options
| author | Sylvain Munaut <tnt@246tNt.com> | 2013-01-16 22:55:24 +0100 |
|---|---|---|
| committer | Andreas Eversberg <jolly@eversberg.eu> | 2013-10-05 19:44:38 +0200 |
| commit | 7a870394d01f8edb9e85237865116d943f3ca983 (patch) | |
| tree | 8566da5ea48a5daeeafd2c3011d9c3a06dbf8c37 | |
| parent | 0e18d1a159fa4fb6b9463ad494d8984b5cba57ed (diff) | |
fw/calypso/uart: Tweak the RX irq threshold to avoid overrun
We use the extended mode to have a better control
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
| -rw-r--r-- | src/target/firmware/calypso/uart.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/target/firmware/calypso/uart.c b/src/target/firmware/calypso/uart.c index ec587de5..d843b071 100644 --- a/src/target/firmware/calypso/uart.c +++ b/src/target/firmware/calypso/uart.c @@ -313,7 +313,6 @@ void uart_init(uint8_t uart, uint8_t interrupts) uart_reg_write(uart, XON2, 0x00); /* Xon2/Addr Register */ uart_reg_write(uart, XOFF1, 0x00); /* Xoff1 Register */ uart_reg_write(uart, XOFF2, 0x00); /* Xoff2 Register */ - uart_reg_write(uart, EFR, 0x00); /* Enhanced Features Register */ /* select UART mode */ uart_reg_write(uart, MDR1, 0); @@ -323,6 +322,9 @@ void uart_init(uint8_t uart, uint8_t interrupts) uart_reg_write(uart, FCR, FIFO_EN | RX_FIFO_CLEAR | TX_FIFO_CLEAR | (3 << TX_FIFO_TRIG_SHIFT) | (3 << RX_FIFO_TRIG_SHIFT)); + /* Override RX irq threshold */ + uart_reg_write(uart, TLR, (8 << 4) | (0 << 0)); + /* THR interrupt only when TX FIFO and TX shift register are empty */ uart_reg_write(uart, SCR, (1 << 0));// | (1 << 3)); |