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| author | Vadim Yanitskiy <axilirator@gmail.com> | 2018-08-14 04:52:01 +0700 |
|---|---|---|
| committer | Vadim Yanitskiy <axilirator@gmail.com> | 2018-08-14 05:00:00 +0700 |
| commit | 8ae0c13fa93ef19a2b1a683f390427b7411aa0e0 (patch) | |
| tree | 4e95dc4264d3b00464ff03d341cfb4b73c831e6d | |
| parent | d4fb4fdea097f0fd1e9f2cd72d0d8a30c91f48bf (diff) | |
trxcon/sched_trx.h: add missing parentheses to PRIM_IS_*
Change-Id: Ifa7d9f806b3f18f2dfec931252f5119441b30e8a
| -rw-r--r-- | src/host/trxcon/sched_trx.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/host/trxcon/sched_trx.h b/src/host/trxcon/sched_trx.h index 17e30bff..cd9c0e4a 100644 --- a/src/host/trxcon/sched_trx.h +++ b/src/host/trxcon/sched_trx.h @@ -296,10 +296,10 @@ int sched_prim_push(struct trx_instance *trx, (trx_lchan_desc[chan].link_id & TRX_CH_LID_SACCH) #define PRIM_IS_TCH(prim) \ - CHAN_IS_TCH(prim->chan) && prim->payload_len != GSM_MACBLOCK_LEN + (CHAN_IS_TCH(prim->chan) && prim->payload_len != GSM_MACBLOCK_LEN) #define PRIM_IS_FACCH(prim) \ - CHAN_IS_TCH(prim->chan) && prim->payload_len == GSM_MACBLOCK_LEN + (CHAN_IS_TCH(prim->chan) && prim->payload_len == GSM_MACBLOCK_LEN) struct trx_ts_prim *sched_prim_dequeue(struct llist_head *queue, enum trx_lchan_type lchan_type); |