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authorPhilipp Maier <pmaier@sysmocom.de>2023-09-22 16:38:19 +0200
committerPhilipp Maier <pmaier@sysmocom.de>2023-09-22 16:38:19 +0200
commit7f064e6b02c5505365633e8532a54ed70aa3bec0 (patch)
treed6c7726f27c7de81ba142f546ca33bc51207449a
parentc49069b53480a72b6482513d04ae62024028bc02 (diff)
PCU_Tests: make sure ts_BSSGP_DL_UD includes IMSI
Whenever we send a ts_BSSGP_DL_UD via BSSGP and we expect the downlink assignment on the paging channel by calling f_ms_exp_dl_tbf_ass_ccch(ms), then we should make sure that ts_BSSGP_IMSI actually contains an IMSI (paging group) Related: OS#5927 Change-Id: I356d93edd03c7e7564bde88d34effcf1b1967621
-rw-r--r--pcu/PCU_Tests.ttcn14
1 files changed, 7 insertions, 7 deletions
diff --git a/pcu/PCU_Tests.ttcn b/pcu/PCU_Tests.ttcn
index ba27e581..012a0be7 100644
--- a/pcu/PCU_Tests.ttcn
+++ b/pcu/PCU_Tests.ttcn
@@ -479,7 +479,7 @@ testcase TC_pcuif_suspend_active_tbf() runs on RAW_PCU_Test_CT {
/* New data arrives, PCU should page the MS since no TBF active exists: */
/* Send some more data, it will never reach the MS */
- BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data));
+ BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data, imsi := ts_BSSGP_IMSI(ms.imsi)));
f_ms_exp_dl_tbf_ass_ccch(ms);
f_shutdown(__BFILE__, __LINE__, final := true);
@@ -1785,7 +1785,7 @@ testcase TC_x2031_t3191() runs on RAW_PCU_Test_CT {
f_sleep(int2float(info_ind.t3191));
/* The TBF should be freed now, so new data should trigger an Assignment: */
- BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data2));
+ BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data2, imsi := ts_BSSGP_IMSI(ms.imsi)));
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
@@ -1860,7 +1860,7 @@ testcase TC_zero_x2031_t3191() runs on RAW_PCU_Test_CT {
f_sleep(int2float(info_ind.t3191));
/* The TBF should be freed now, so new data should trigger an Assignment: */
- BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data2));
+ BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data2, imsi := ts_BSSGP_IMSI(ms.imsi)));
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS: */
@@ -3128,10 +3128,10 @@ testcase TC_dl_llc_sapi_priority() runs on RAW_PCU_Test_CT {
for (var integer i := 0; i < 10; i := i + 1) {
BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data_sapi_other, imsi := ts_BSSGP_IMSI(ms.imsi)));
}
- BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data_sapi2));
- BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data_sapi7));
- BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data_sapi8));
- BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data_sapi1));
+ BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data_sapi2, imsi := ts_BSSGP_IMSI(ms.imsi)));
+ BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data_sapi7, imsi := ts_BSSGP_IMSI(ms.imsi)));
+ BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data_sapi8, imsi := ts_BSSGP_IMSI(ms.imsi)));
+ BSSGP[0].send(ts_BSSGP_DL_UD(ms.tlli, data_sapi1, imsi := ts_BSSGP_IMSI(ms.imsi)));
f_ms_exp_dl_tbf_ass_ccch(ms);
/* Wait timer X2002 and DL block is available after CCCH IMM ASS */