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Replace the polyphase filter and resampler with a separate
implementation using SSE enabled convolution. The USRP2 (including
derived devices N200, N210) are the only supported devices that
require sample rate conversion, so set the default resampling
parameters for the 100 MHz FPGA clock. This changes the previous
resampling ratios.
270.833 kHz -> 400 kHz (65 / 96)
270.833 kHz -> 390.625 kHz (52 / 75)
The new resampling factor uses a USRP resampling factor of 256
instead of 250. On the device, this allows two halfband filters to
be used rather than one. The end result is reduced distortial and
aliasing effecits from CIC filter rolloff.
B100 and USRP1 will no be supported at 400 ksps with these changes.
Signed-off-by: Thomas Tsou <tom@tsou.cc>
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