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2017-06-14siggen: Add osmo-siggen for GSM/EDGE test signal generationttsou/siggenTom Tsou7-23/+889
* Adds 4 and 1 pulse Laurent GMSK modulators * Adds NCO based modulator * Adds synchronization and frequency burst generators * Adds GPIO frame trigger on GPIO-0 * Tested on USRP B210 only * Requires C++14 support B210 GPIO Pin Map J504 --------- fp_gpio<0> | 1 | 2 | fp_gpio<1> --------- fp_gpio<2> | 3 | 4 | fp_gpio<3> --------- fp_gpio<4> | 5 | 6 | fp_gpio<5> --------- fp_gpio<6> | 7 | 8 | fp_gpio<7> --------- gnd | 9 | 10| gnd --------- Change-Id: I891725d7f0cfa97c79e64f978a60dc11a206195c Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
2017-06-14uhd: Add non-UmTRX channel swap supportTom Tsou1-21/+44
Previously an UmTRX-only feature. Change-Id: I4a0e0c1d69e89993158e948535ad33f54e568d2d Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
2017-06-14sigProcLib: Remove unused functions from public interfaceTom Tsou2-467/+52
Also remove entirely completely unused calls. Most of these calls have been around since OpenBTS conception. Nearly a decade is long enough time for deprecation. Change-Id: Ifc122aaff23414c363b4b00f99061eed8a6902d0
2017-06-12uhd: Use map container for for device parameter accessTom Tsou1-274/+84
OsmoTRX is written in C++ so we might as well use built-in container types when applicable. Map access allows removal of significant amounts of special device handling code. Aggregate device rates and timing offsets into a single table with access keyed by device/tx-sps/rx-sps tuples. Change-Id: I8660f75a2b2a13488b913c07637bdd0f5f0f4cf9 Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
2017-06-09build: Require and check for gcc C++11 supportTom Tsou3-0/+1022
It is now 2017. We can and should be able to use C++11 features now. Change-Id: I96477e4125390b17b43a3705bb1daf98fa01c9bb Signed-off-by: Tom Tsou <tom.tsou@ettus.com>
2017-06-08PRBS: a Pseudo-random binary sequence (PRBS) generator class.Alexander Chemeris4-0/+157
Implemeted with a Galois LFSR for speed and flexibility compared to Fibonacci version. Aliases for three popular PRBS' are added for convenience - PRBS9, PRBS15 and PRBS64. Note that we can't test PRBS64 completely, because the sequence is too long to be generated. Change-Id: Ib5331ba5d0b5819929541686fdd87905e2177b74
2017-06-08ssedetect: call __builtin_cpu_supports() only if supportedVadim Yanitskiy3-1/+11
Some compilers don't support the __builtin_cpu_supports built-in, so let's make them able to compile the project anyway. Change-Id: I0c90402d8e4c9f196c54b066ff30891c8de3ad2b
2017-06-08buildenv: check for __builtin_cpu_supports call supportVadim Yanitskiy1-0/+27
The '__builtin_cpu_supports' is a GCC's built-in function which returns a positive integer if the run-time CPU supports specified SIMD feature and returns 0 otherwise. This change adds a new check, whether compiler supports this call. See /gcc/X86-Built-in-Functions.html at gcc.gnu.org for reference. Change-Id: I797f638573e8c3aae39c28abb157ce2ac419f3f7
2017-06-08buildenv: cosmetic changesVadim Yanitskiy1-6/+8
Change-Id: I9c52f2981513fa6322bdf992215e3e099ac3ddee
2017-06-08buildenv: fix build on systems without SIMD supportVadim Yanitskiy1-2/+3
HAVE_SSE3 and HAVE_SSE4_1 were never defined if CPU architecture doesn't match the (86*|x86_64*|amd64*) condition. Change-Id: I3350b14dbc91e9b388d0b04a0ed22ba27d436313
2017-06-08buildenv: actually strip unused cpuid functionalityVadim Yanitskiy3-164/+0
Despite the macro message says, that cpuid functionality was stripped it was still partially preset and wasn't used anyhow. Change-Id: I380bc9c13d29319685781ef27973afe6744fcf3d
2017-06-08buildenv: correct the ax_sse macro descriptionVadim Yanitskiy1-6/+5
Change-Id: I4ce65443c8a33ae9add8f6da9d911c3178472ab2
2017-05-30BitVector: Remove Generator class.Alexander Chemeris2-86/+0
It is not used in osmo-trx, because we're not doing FEC or CRC checks. Change-Id: I1509e785c1187ebdafe5b2518bd298fbbd1cd036
2017-05-30Configuration: Variables allocated with 'new' must be freed with 'delete'.Alexander Chemeris1-3/+3
Thank you Valgrind. Change-Id: I8477e4e37282947f9841cee9002565631ca0c0b6
2017-05-29sigProcLib: Fix number of tail bits in random Normal Bursts and zero ↵Alexander Chemeris1-3/+9
Stealing Bits. This bug only affects generation of normal bursts filled with random bits which are used in test mode. It doesn't affect operation of osmo-trx during normal operation. That's why it has stayed unnoticed for so long. Each Normal Burst has 3 tail bits, not 4. Also it's better to set stealing bits to 0 for maximum compatibility. We may want to introduce a selector for each bit whether to set it to 0, to 1 or to a random number. Change-Id: I0377029556c8b681b3ba3b635bf19572b34546ea
2017-05-19debian: remove obsolete dependencyMax1-1/+0
This should fix package build for Ubuntu 17.04: obsolete package hardening-wrapper was removed which cause .deb build failure. The dependency on it is incorrect to begin with because we use DEB_BUILD_MAINT_OPTIONS instead. Change-Id: I3ea72b4123a280a846086d083c4f3189d611f8cf
2017-05-19radioInterface: Remove UmTRX 'diversity' optionTom Tsou9-406/+16
The 'diversity' option was an experimental 2 antenna receiver implementation for UmTRX. The implementation has not been maintained and current working status is unknown. In addition to code rot, Coverity is triggering errors in the associated code sections. Removal of code cleans up many cases of special handling that were necessary to accommodate the implementation. Change-Id: I46752ccf5dbcffbec806081dec03e69a0fbdcdb7
2017-05-19cosmetic: Add info about SSE supportPhilipp Maier1-0/+16
The osmo-trx binary outputs no info about its SSE support status. This commits adds some putput that informs about the SSE of the binary and also tells which of the SSE levels the CPU supports. Change-Id: Iacc83fd668c31644e0efb3e18962cf2870ed1daf
2017-05-19buildenv: Split up SSE3 and SSE4.1 codePhilipp Maier12-661/+893
Currently we find SSE3 and SSE4.1 code mixed togehter along with generic code in one file. This introduces the risk that the compiler exidantly mixes SSE4.1 instructions into an SSE3, or even worse into a generic code path. This commit splits the SSE3 and SSE4.1 code into separate files and compiles them with the matching target options. Change-Id: I846e190e92f1258cd412d1b2d79b539e204e04b3
2017-05-19buildenv: Make build CPU invariantPhilipp Maier1-166/+16
Currently the build environment checks which extension the current CPU supports and picks the compiler flags accordingly. If the build is happening on a machine that does not support the extensions we need (SSE3, SSE4.1), the binary will lack those extensions, even if its intended to be used on a more powerful machine that would support the extensions. This commit removes the CPU tests from the build process. Change-Id: Ic913aa13c23c348ae62e78c9dfd6ed8b0a62798c
2017-05-19cosmetic: remove code duplicationPhilipp Maier5-35/+49
The ARM and the X86 implementation of the conversion functions share the same, non cpu specific implementation in separate files. This commit removes the code duplication by putting the generic implementation into a convert_base.c, similar to to convolve_base.c Change-Id: Ic8d8534a343e27cde79ddc85be4998ebd0cb6e5c
2017-05-19ssedetect: Add runtime CPU detectionPhilipp Maier6-49/+142
The current implementation can select the SSE support level during compiletime only. This commit adds functionality to automatically detect and switch the SSE support level and automatically switch the Implementation if the CPU does not support the required SSE level. Change-Id: Iba74f8a6e4e921ff31e4bd9f0c7c881fe547423a
2017-05-19Add test program to verify convolution implementationPhilipp Maier3-0/+238
Convolution is a complex process and we should be able to verify if computing results change when the implementation is touched. This commit adds a test program that executes some testcases. The testcases are crafted in a way that every implmentation (several different ones for SSE) is executed once. The output can be compared against the included .ok file. Change-Id: Ic702ecb356c652fbcd76bee689717fb5d3526fe9
2017-05-02cosmetic: Make parameter lists uniformPhilipp Maier2-110/+143
The non-sse implementation and the sse implementation of the convert and convolve functions have different parameter lists. This makes it difficult to use function pointers in order to select the right function depending on the SSE-Level and CPU. This commit uniformizes the parameter lists in preparation for planned runtime cpu detection support Change-Id: Ice063b89791537c4b591751f12f5ef5c413a2d27
2017-05-02buildenv: Turn off native architecture buildsPhilipp Maier1-1/+1
The compiler option -march=native instructs the compiler to auto-optimize the code for the current build architecture. This is fine for building and using locally, but contraproductive when generating binary packages. This commit replaces -march=native with $(SIMD_FLAGS), which contains a collection of supported SIMD options, so we won't loose the SSE support. Change-Id: I3df4b8db9692016115edbe2247beeec090715687
2017-04-10config: Remove OpenBTS style sqlite configurationTom Tsou1-80/+4
OpenBTS relies on reading in configuration values from the OpenBTS.config sqlite3 database. This configuration method is not maintained and not recommended for Osmocom or OpenBTS use. Command line setup is the recommended approach. Note that when the osmo-trx logging mechanism is replaced, the sqlite dependency will be removed. Change-Id: I95d7b771fde976818bee76f89163e72c3a44ecdd
2017-04-03Configuration: Fix const and signedness compile warningsTom Tsou2-2/+2
Change-Id: I701559814b2aee6f84f10e612f128da40f6a51c1
2017-04-03Transceiver: Remove unsigned negative comparesTom Tsou2-3/+3
Change-Id: I49f30699786c52736ef334dae61f7bbd65d878d5 Fixes: Coverity CID 149353, 149356
2017-04-03Resampler: Fix non-array delete for filter tapsTom Tsou1-1/+1
Change-Id: I59cdb01809da5940c74aaae9d17f413aefbf04b2 Fixes: Coverity CID 149349
2017-03-31sigProcLib: Fix negative value check on unsigned valueTom Tsou1-1/+1
Convert negative value check on unsigned value to zero check to avoid potential divide-by-zero error condition. Change-Id: Ib0d7d1bceb5fe66e69345db93a74e3e0773a2257 Fixes: Coverity CID 165059
2017-03-31sigProcLib: Check return status on downsamplingTom Tsou1-2/+6
Improper length values will cause the polyphase resampler rotation to fail. Check return and return NULL on error. Change-Id: I3ad22f9fd7a20754f589c04258dcca3770474a9b Fixes: Coverity CID 165235
2017-03-31sigProcLib: Remove unreachable code and no-effect checksTom Tsou1-6/+2
Unreachable path and negative value inspection on unsigned types. Change-Id: If53b4b03550b0a7656c808cfe96806252153eb2f Fixes: Coverity CID 165239, 165238, 165236
2017-03-31Resampler: Fix initialization return checkingTom Tsou1-1/+1
Greater-than comparison was used on boolean type. Change-Id: Ia3b71b3a06b34a6fd781bf197ecf9d5cc1711d13
2017-03-28sigProcLib: Constify demodulation functions burst argument.Alexander Chemeris2-10/+10
demodCommon() used to scale input vector in place which changed original data. That's a bad practice and is not really necessary, so I've changed the code to scale burst after it's copied to a new vector during a delay operation. Change-Id: Ic45f71b634e48808356d68925bb9f5783e0bf0d3
2017-03-28sigProcLib: constify signalVector arguments for detectBurst() functions.Alexander Chemeris2-23/+24
Change-Id: Ic033371a387353eb12b1827a0eb16c00c07da88a
2017-03-28Move Transceiver::demodulate() to sigProcLib to make it reusable.Alexander Chemeris4-17/+14
Change-Id: I2cad47160e53f65612bd1da8998c83a0a22bce9b
2017-03-28sigProcLib.h: Fix whitespaces. No non-whitespace changes.Alexander Chemeris1-46/+46
The file seem to be using "2 spaces" indent, bt some lines are using tabs which breaks formatting. Change-Id: I7718cca45c245c9e91250ab2877f5436d4029698
2017-03-28sigProcLib: Add operator<< to print CorrType to a string.Alexander Chemeris2-0/+25
Change-Id: I3d68cbdab8fb504d7f155029654a576d318a201e
2017-03-28Move BURST_THRESH from Transceiver.cpp to sigProcLib.h to make it reusable.Alexander Chemeris2-9/+9
Change-Id: I5a888890e26858c0fbb2ddb7ef23cb0fd66a64b4
2017-03-24Move Transceiver::detectBurst() to sigProcLib to make it reusable.Alexander Chemeris4-37/+56
Change-Id: I3cbe8e6e4f39dde02c945e6c9086c040e276845c
2017-03-24sigProcLib: rename signalError type to SignalError.Alexander Chemeris1-1/+1
Change-Id: I1a5ae6e87d4c69945053fdefec185d0fb1a26399
2017-03-24Move CorrType type from Transceiver to sigProcLib.Alexander Chemeris3-12/+12
Required to move Transceiver::detectBurst to sigProcLib. Change-Id: I3e0e74a98bbca4d19657f50a5fb447f078663c9b
2017-03-24vector: Introduce shrink() function to shrink vector size without loosing data.Alexander Chemeris1-0/+7
Change-Id: I9c0ac2715aea1a90c9e6ebcd982522b80a547099
2017-03-24vector: Introduce segmentMove() method to move data inside of a vector.Alexander Chemeris1-0/+15
Change-Id: I2f3f4267b4137a0bc031f27e0f896fba9b9f3433
2017-03-24signalVector: Implement segment().Alexander Chemeris2-0/+8
Change-Id: I6fe3aae53fb2fa5bb7637e976de6059eabe08202
2017-03-22BitVector: Convert SoftVector from 0..1 to -1..+1 soft bits.Alexander Chemeris2-13/+13
This makes code simpler and will allow us send -127..127 soft bits towards osmo-bts instead of 0..255 bits. Change-Id: I16ecc3d4c829dcf0f619ad995bc9d4a4ed8af0a4
2017-03-22BitVector: Remove convolutional codec - we don't use it in osmo-trx.Alexander Chemeris3-411/+1
Now we have more fexibility in how we represent SoftVector, since we no longer depend on the particular convolutional codec implementation. Change-Id: I3006b6a26c5eff59dbe9c034f689961802f1d0d0
2017-03-22CommonLibs: Print soft bits with less confidence to console when printing a ↵Alexander Chemeris1-0/+4
soft vector. We use other symbols to show that these bits has less confidence: o and . for 0 with less confidence | and ' for 1 with less confidence Change-Id: I747a17568ee48f1f3163e8dfab2e450af85e6435
2017-03-22Call vectorSlicer() right before packing bits for transmission to osmo-bts.Alexander Chemeris2-3/+3
vectorSlicer() converts soft-bits from -1..+1 to 0..1 while we want to keep SoftVector in -1..+1 mode until the last minute, because at some point we'll want to transmit -1..+1 to osmo-bts instead of converting it from 0..1 back to -1..+1 on the osmo-bts side. Plus it removes code duplication - we call it once instead of twice. Change-Id: Idd6ddd7ac219afb0df055a692632678b66373764
2017-03-22sigProcLib: Slice SoftVector instead of signalVector for GMSK demod.Alexander Chemeris2-26/+22
This makes it similar to 8-PSK demod and also saves a bit of lines ofcode and should give us a tiny improvement in performance. Ideally we need to remove vector slicing at all, because in osmo-bts-trx we convert back to +-1.0 again (actually to +-127, but it doesn't mater). So we should rather transmit +-1.0 values to avoid double conversion. Change-Id: If9ed6f0f80fbe88c994b2f9c3cae91d0d57f4442