Transceiver52M: Setup dual sample rate transceiver

This patch applies oversampling, when selected with 4 sps,
to the downlink only, while running the receiver with
minimal sampling at 1 sps. These split sample rates allow
us to run a highly accurate downlink signal with minimal
distortion, while keeping receive path channel filtering
on the FPGA.

Without this patch, we oversample the receive path and
require a steep receive filter to get similar adjacent
channel suppression as the FPGA halfband / CIC filter
combination, which comes with a high computational cost.

Signed-off-by: Thomas Tsou <tom@tsou.cc>

1 files changed, 3 insertions, 1 deletions

diff --git a/Transceiver52M/USRPDevice.h b/Transceiver52M/USRPDevice.h
index f5bc939..01cf261 100644
--- a/Transceiver52M/USRPDevice.h
+++ b/Transceiver52M/USRPDevice.h
@@ -60,6 +60,7 @@ private:
   usrp_subdev_spec rxSubdevSpec;
   usrp_subdev_spec txSubdevSpec;
 
+  int sps;
   double actualSampleRate;	///< the actual USRP sampling rate
   unsigned int decimRate;	///< the USRP decimation rate
 
@@ -87,7 +88,8 @@ private:
   TIMESTAMP timestampOffset;       ///< timestamp offset b/w Tx and Rx blocks
   TIMESTAMP latestWriteTimestamp;  ///< timestamp of most recent ping command
   TIMESTAMP pingTimestamp;	   ///< timestamp of most recent ping response
-  static const TIMESTAMP PINGOFFSET = 272;  ///< undetermined delay b/w ping response timestamp and true receive timestamp
+
+  long long  pingOffset;
   unsigned long hi32Timestamp;
   unsigned long lastPktTimestamp;