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authorThomas Tsou <tom@tsou.cc>2013-08-20 20:54:54 -0400
committerThomas Tsou <tom@tsou.cc>2013-10-18 13:10:17 -0400
commit03e6ecf9771ea029e69fd4cdc2f2e289e93d3978 (patch)
tree9bd4abdc74ba979a051386b1d730378ae254bdab /Transceiver52M/UHDDevice.cpp
parent3eaae80c90752abe3173c43a5dae5cdf17493764 (diff)
Transceiver52M: Replace resampler with SSE enabled implementation
Replace the polyphase filter and resampler with a separate implementation using SSE enabled convolution. The USRP2 (including derived devices N200, N210) are the only supported devices that require sample rate conversion, so set the default resampling parameters for the 100 MHz FPGA clock. This changes the previous resampling ratios. 270.833 kHz -> 400 kHz (65 / 96) 270.833 kHz -> 390.625 kHz (52 / 75) The new resampling factor uses a USRP resampling factor of 256 instead of 250. On the device, this allows two halfband filters to be used rather than one. The end result is reduced distortial and aliasing effecits from CIC filter rolloff. B100 and USRP1 will no be supported at 400 ksps with these changes. Signed-off-by: Thomas Tsou <tom@tsou.cc>
Diffstat (limited to 'Transceiver52M/UHDDevice.cpp')
-rw-r--r--Transceiver52M/UHDDevice.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/Transceiver52M/UHDDevice.cpp b/Transceiver52M/UHDDevice.cpp
index a627a64..261a32f 100644
--- a/Transceiver52M/UHDDevice.cpp
+++ b/Transceiver52M/UHDDevice.cpp
@@ -34,7 +34,7 @@
#define B100_CLK_RT 52e6
#define B100_BASE_RT GSMRATE
-#define USRP2_BASE_RT 400e3
+#define USRP2_BASE_RT 390625
#define TX_AMPL 0.3
#define SAMPLE_BUF_SZ (1 << 20)