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-rw-r--r--tests/tbf/TbfTest.err6
1 files changed, 3 insertions, 3 deletions
diff --git a/tests/tbf/TbfTest.err b/tests/tbf/TbfTest.err
index dd1c9e48..d0463826 100644
--- a/tests/tbf/TbfTest.err
+++ b/tests/tbf/TbfTest.err
@@ -3023,12 +3023,12 @@ Modifying MS object, TLLI = 0x00000000, MS class 0 -> 12
Searching for first unallocated TFI: TRX=0
Found TFI=0.
Slot Allocation (Algorithm B) for class 12
-- Rx=4 Tx=4 Sum Rx+Tx=5 Tta=2 Ttb=1 Tra=2 Trb=1 Type=1
- Skipping TS 0, because not enabled
- Skipping TS 1, because not enabled
- Skipping TS 6, because not enabled
- Skipping TS 7, because not enabled
- Possible DL/UL slots: (TS=0)"..CCCC.."(TS=7)
+Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1
- Selected DL slots: (TS=0)"..DDDD.."(TS=7)
Using 4 slots for DL
- Reserved DL/UL slots: (TS=0)"..DDCD.."(TS=7)
@@ -3062,12 +3062,12 @@ TBF(TFI=0 TLLI=0x00000000 DIR=DL STATE=NULL EGPRS) Enabled EGPRS, mode EGPRS
Searching for first unallocated TFI: TRX=0
Found TFI=0.
Slot Allocation (Algorithm B) for class 12
-- Rx=4 Tx=4 Sum Rx+Tx=5 Tta=2 Ttb=1 Tra=2 Trb=1 Type=1
- Skipping TS 0, because not enabled
- Skipping TS 1, because not enabled
- Skipping TS 6, because not enabled
- Skipping TS 7, because not enabled
- Possible DL/UL slots: (TS=0)"..CCCC.."(TS=7)
+Rx=4 Tx=4 Sum Rx+Tx=5, Tta=2 Ttb=1, Tra=2 Trb=1, Type=1
- Selected DL slots: (TS=0)"..DDDD.."(TS=7)
Using 4 slots for DL
- Reserved DL/UL slots: (TS=0)"..DDCD.."(TS=7)
@@ -5913,12 +5913,12 @@ TBF(TFI=0 TLLI=0x00000000 DIR=DL STATE=NULL EGPRS) Enabled EGPRS, mode EGPRS
Searching for first unallocated TFI: TRX=0
Found TFI=0.
Slot Allocation (Algorithm B) for class 11
-- Rx=4 Tx=3 Sum Rx+Tx=5 Tta=3 Ttb=1 Tra=2 Trb=1 Type=1
- Skipping TS 0, because not enabled
- Skipping TS 1, because not enabled
- Skipping TS 6, because not enabled
- Skipping TS 7, because not enabled
- Possible DL/UL slots: (TS=0)"..CCCC.."(TS=7)
+Rx=4 Tx=3 Sum Rx+Tx=5, Tta=3 Ttb=1, Tra=2 Trb=1, Type=1
- Selected DL slots: (TS=0)"..ddDd.."(TS=7), single
Using single slot at TS 4 for DL
- Reserved DL/UL slots: (TS=0)"....C..."(TS=7)