diff options
| author | Max <msuraev@sysmocom.de> | 2016-02-01 15:51:44 +0100 |
|---|---|---|
| committer | Max <msuraev@sysmocom.de> | 2016-02-01 15:51:44 +0100 |
| commit | 9ec544229953132789f125e4f1111d98f82cf2a5 (patch) | |
| tree | fee88ec44a85736a8525532d9aa51d89bdf82985 /src/osmo-bts-sysmo/sysmo_l1_if.c | |
| parent | 4d25f2737bf773205908282f92af93eccdfc75b8 (diff) | |
Change internal API for consistencymax/mutrx
Use uint8_t for TRX numbering everywhere (we don't expect hardware with
more than 256 transceivers in the near future). This change helps to
avoid unnecessary casts and make API much clearer.
Diffstat (limited to 'src/osmo-bts-sysmo/sysmo_l1_if.c')
| -rw-r--r-- | src/osmo-bts-sysmo/sysmo_l1_if.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/osmo-bts-sysmo/sysmo_l1_if.c b/src/osmo-bts-sysmo/sysmo_l1_if.c index 85727861..8ecbcfb4 100644 --- a/src/osmo-bts-sysmo/sysmo_l1_if.c +++ b/src/osmo-bts-sysmo/sysmo_l1_if.c @@ -155,7 +155,7 @@ static int handle_ph_readytosend_ind(struct femtol1_hdl *fl1h, switch (rts_ind->sapi) { case GsmL1_Sapi_Pdtch: case GsmL1_Sapi_Pacch: - rc = pcu_rx_rts_req_pdtch((long)fl1h->priv, rts_ind->u8Tn, + rc = pcu_rx_rts_req_pdtch(fl1h->trx, rts_ind->u8Tn, rts_ind->u16Arfcn, rts_ind->u32Fn, rts_ind->u8BlockNbr); case GsmL1_Sapi_Ptcch: // FIXME @@ -215,7 +215,7 @@ static int handle_ph_data_ind(struct femtol1_hdl *fl1h, != GsmL1_PdtchPlType_Full) break; /* PDTCH / PACCH frame handling */ - pcu_rx_data_ind_pdtch((long)fl1h->priv, data_ind->u8Tn, + pcu_rx_data_ind_pdtch(fl1h->trx, data_ind->u8Tn, data_ind->msgUnitParam.u8Buffer + 1, data_ind->msgUnitParam.u8Size - 1, data_ind->u32Fn, @@ -357,7 +357,7 @@ int l1if_pdch_req(void *obj, uint8_t ts, int is_ptcch, uint32_t fn, return 0; } -void *l1if_open_pdch(void *priv, uint32_t hlayer1) +void *l1if_open_pdch(uint8_t trx, uint32_t hlayer1) { struct femtol1_hdl *fl1h; int rc; @@ -367,7 +367,7 @@ void *l1if_open_pdch(void *priv, uint32_t hlayer1) return NULL; fl1h->hLayer1 = hlayer1; - fl1h->priv = priv; + fl1h->trx = trx; fl1h->clk_cal = 0; /* default clock source: OCXO */ fl1h->clk_src = SuperFemto_ClkSrcId_Ocxo; |