diff options
author | Harald Welte <laforge@gnumonks.org> | 2012-08-20 09:02:21 +0200 |
---|---|---|
committer | Harald Welte <laforge@gnumonks.org> | 2012-08-20 09:02:21 +0200 |
commit | 663a20c6885f7dc45c803059d823d16921c7d3e0 (patch) | |
tree | e36ef6502f4dbc6632e1d5b2399aa33ea09b12b8 | |
parent | df351db71f79fcc8134bbb25dbcc7569e235d892 (diff) |
use 'volatile' to avoid unwanted compiler optimization
The fact that we just wrote to a given register doesn't mean that we can
skip re-reading it again...
-rw-r--r-- | src/cc32/cc32_flcon.c | 2 | ||||
-rw-r--r-- | src/cc32/cc32_regs.h | 7 | ||||
-rw-r--r-- | src/cc32/cc32_spi.c | 4 | ||||
-rw-r--r-- | src/cc32/cc32_spi.h | 2 |
4 files changed, 9 insertions, 6 deletions
diff --git a/src/cc32/cc32_flcon.c b/src/cc32/cc32_flcon.c index fc9ff1c..0a82aed 100644 --- a/src/cc32/cc32_flcon.c +++ b/src/cc32/cc32_flcon.c @@ -33,7 +33,7 @@ enum cc32_flcon_reg { FLBUF = 0x10, }; -#define FLCON_REG(x) (uint32_t *)((uint8_t *)CC32_FLCON_BASE + x) +#define FLCON_REG(x) (volatile uint32_t *)((uint8_t *)CC32_FLCON_BASE + x) int cc32_flash_erase(uint32_t offset, uint16_t page_size) diff --git a/src/cc32/cc32_regs.h b/src/cc32/cc32_regs.h index c6adad4..bc50ef6 100644 --- a/src/cc32/cc32_regs.h +++ b/src/cc32/cc32_regs.h @@ -1,6 +1,9 @@ #ifndef _CC32_REGS_H #define _CC32_REGS_H +#define CC32_REG(base, x) (volatile uint32_t *) \ + ((uint8_t *)((base) + (x))) + #define CC32_SYSC_BASE 0x0F0000 enum cc32_sysc_reg { @@ -22,7 +25,7 @@ enum cc32_sysc_reg { SCCM4 = 0x7C, }; -#define SYSC_REG(x) (uint32_t *)((uint8_t *)CC32_SYSC_BASE + x) +#define SYSC_REG(x) CC32_REG(CC32_SYSC_BASE, x) #define CC32_GPIO_BASE 0x0f8c00 @@ -34,7 +37,7 @@ enum cc32_gpio_reg { GPIODIR1 = 0x0C, }; -#define GPIO_REG(x) (uint32_t *)((uint8_t *)CC32_GPIO_BASE + x) +#define GPIO_REG(x) CC32_REG(CC32_GPIO_BASE, x) #endif /* _CC32_REGS_H */ diff --git a/src/cc32/cc32_spi.c b/src/cc32/cc32_spi.c index 75dafae..0c4c523 100644 --- a/src/cc32/cc32_spi.c +++ b/src/cc32/cc32_spi.c @@ -40,7 +40,7 @@ enum cc32_spi_reg { SPIDMARPT = 0x48, }; -#define SPI_REG(x) (uint32_t *)((uint8_t *)CC32_SPI_BASE + x) +#define SPI_REG(x) (volatile uint32_t *)((uint8_t *)CC32_SPI_BASE + x) #define SPICON2_RUNEN (1 << 7) @@ -97,7 +97,7 @@ int cc32_spi_xcv_byte(uint8_t tx) return *SPI_REG(SPIDAT); } -int cc32_spi_ncs(uint8_t high) +void cc32_spi_ncs(uint8_t high) { cc32_gpio_set(BOARD_GPIO_SPI_NCS, high); } diff --git a/src/cc32/cc32_spi.h b/src/cc32/cc32_spi.h index 917c721..dd418f0 100644 --- a/src/cc32/cc32_spi.h +++ b/src/cc32/cc32_spi.h @@ -5,6 +5,6 @@ int cc32_spi_init(uint8_t cpol, uint8_t cpha, uint8_t divide_2n); int cc32_spi_xcv_byte(uint8_t tx); -int cc32_spi_ncs(uint8_t high); +void cc32_spi_ncs(uint8_t high); #endif |