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authorHarald Welte <laforge@gnumonks.org>2011-10-12 13:36:22 +0200
committerHarald Welte <laforge@gnumonks.org>2011-10-12 13:36:22 +0200
commit9582883235743e31800ec7cbfc8af2c16b63cdbb (patch)
tree13dfe286b5eed52e969965fa09d2af03f8aec440 /src/osmo-bts-sysmo/sysmobts_vty.c
parentc373448e03f12f8f7e5da1d894d63d7bc79eef4a (diff)
add VTY based way to set clock calibration of sysmobts L1
Diffstat (limited to 'src/osmo-bts-sysmo/sysmobts_vty.c')
-rw-r--r--src/osmo-bts-sysmo/sysmobts_vty.c46
1 files changed, 46 insertions, 0 deletions
diff --git a/src/osmo-bts-sysmo/sysmobts_vty.c b/src/osmo-bts-sysmo/sysmobts_vty.c
index 78ad6c93..93dd024b 100644
--- a/src/osmo-bts-sysmo/sysmobts_vty.c
+++ b/src/osmo-bts-sysmo/sysmobts_vty.c
@@ -39,6 +39,7 @@
#include <osmo-bts/gsm_data.h>
#include <osmo-bts/logging.h>
+#include <osmo-bts/vty.h>
#include "femtobts.h"
#include "l1_if.h"
@@ -99,6 +100,35 @@ err:
return str;
}
+/* configuration */
+
+DEFUN(cfg_trx_clkcal_def, cfg_trx_clkcal_def_cmd,
+ "clock-calibration default",
+ "Set the clock calibration value\n" "Default Clock DAC value\n")
+{
+ unsigned int clkcal = atoi(argv[0]);
+ struct gsm_bts_trx *trx = vty->index;
+ struct femtol1_hdl *fl1h = trx_femtol1_hdl(trx);
+
+ fl1h->clk_cal = 0xffff;
+
+ return CMD_SUCCESS;
+}
+
+DEFUN(cfg_trx_clkcal, cfg_trx_clkcal_cmd,
+ "clock-calibration <0-4095>",
+ "Set the clock calibration value\n" "Clock DAC value\n")
+{
+ unsigned int clkcal = atoi(argv[0]);
+ struct gsm_bts_trx *trx = vty->index;
+ struct femtol1_hdl *fl1h = trx_femtol1_hdl(trx);
+
+ fl1h->clk_cal = atoi(argv[0]) & 0xfff;
+
+ return CMD_SUCCESS;
+}
+
+/* runtime */
DEFUN(show_dsp_trace_f, show_dsp_trace_f_cmd,
"show trx <0-0> dsp-trace-flags",
@@ -210,6 +240,19 @@ DEFUN(show_sys_info, show_sys_info_cmd,
return CMD_SUCCESS;
}
+void bts_model_config_write_bts(struct vty *vty, struct gsm_bts *bts)
+{
+}
+
+void bts_model_config_write_trx(struct vty *vty, struct gsm_bts_trx *trx)
+{
+ struct femtol1_hdl *fl1h = trx_femtol1_hdl(trx);
+
+ if (fl1h->clk_cal != 0xffff) {
+ vty_out(vty, " clock-calibration %u%s", fl1h->clk_cal,
+ VTY_NEWLINE);
+ }
+}
int bts_model_vty_init(struct gsm_bts *bts)
{
@@ -226,5 +269,8 @@ int bts_model_vty_init(struct gsm_bts *bts)
install_element_ve(&dsp_trace_f_cmd);
install_element_ve(&no_dsp_trace_f_cmd);
+ install_element(TRX_NODE, &cfg_trx_clkcal_cmd);
+ install_element(TRX_NODE, &cfg_trx_clkcal_def_cmd);
+
return 0;
}