aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorHolger Hans Peter Freyther <zecke@selfish.org>2012-04-14 14:42:26 +0200
committerHolger Hans Peter Freyther <zecke@selfish.org>2012-04-14 14:56:58 +0200
commitbc74b7f432811c1f4acb3d18827d4fa8673527f6 (patch)
tree12441bec29fd7e4a045067c0b2a0db52b3b010ab
parentf4a5bd2dd25291a5ff036d6273731c6147736a5e (diff)
femtobts: The separate pdch/tch queues are not available in the old firmware
The old firmware does not expose separate queues for PDCH and TCH. The change appears to be too intrusive and I will try to find a more elegant solution.
-rw-r--r--src/osmo-bts-sysmo/l1_if.h4
-rw-r--r--src/osmo-bts-sysmo/l1_transp_fwd.c2
-rw-r--r--src/osmo-bts-sysmo/l1_transp_hw.c8
3 files changed, 13 insertions, 1 deletions
diff --git a/src/osmo-bts-sysmo/l1_if.h b/src/osmo-bts-sysmo/l1_if.h
index a0c71279..18ea0e0f 100644
--- a/src/osmo-bts-sysmo/l1_if.h
+++ b/src/osmo-bts-sysmo/l1_if.h
@@ -9,16 +9,20 @@
enum {
MQ_SYS_READ,
MQ_L1_READ,
+#ifndef HW_FEMTOBTS
MQ_TCH_READ,
MQ_PDTCH_READ,
+#endif
_NUM_MQ_READ
};
enum {
MQ_SYS_WRITE,
MQ_L1_WRITE,
+#ifndef HW_FEMTOBTS
MQ_TCH_WRITE,
MQ_PDTCH_WRITE,
+#endif
_NUM_MQ_WRITE
};
diff --git a/src/osmo-bts-sysmo/l1_transp_fwd.c b/src/osmo-bts-sysmo/l1_transp_fwd.c
index e233f529..f57299ab 100644
--- a/src/osmo-bts-sysmo/l1_transp_fwd.c
+++ b/src/osmo-bts-sysmo/l1_transp_fwd.c
@@ -56,8 +56,10 @@
static const uint16_t fwd_udp_ports[] = {
[MQ_SYS_WRITE] = L1FWD_SYS_PORT,
[MQ_L1_WRITE] = L1FWD_L1_PORT,
+#ifndef HW_FEMTOBTS
[MQ_TCH_WRITE] = L1FWD_TCH_PORT,
[MQ_PDTCH_WRITE]= L1FWD_PDTCH_PORT,
+#endif
};
static int fwd_read_cb(struct osmo_fd *ofd)
diff --git a/src/osmo-bts-sysmo/l1_transp_hw.c b/src/osmo-bts-sysmo/l1_transp_hw.c
index 3cdd5f8e..648aad61 100644
--- a/src/osmo-bts-sysmo/l1_transp_hw.c
+++ b/src/osmo-bts-sysmo/l1_transp_hw.c
@@ -57,25 +57,29 @@
#define DEV_SYS_ARM2DSP_NAME "/dev/msgq/superfemto_arm2dsp"
#define DEV_L1_DSP2ARM_NAME "/dev/msgq/gsml1_sig_dsp2arm"
#define DEV_L1_ARM2DSP_NAME "/dev/msgq/gsml1_sig_arm2dsp"
-#endif
#define DEV_TCH_DSP2ARM_NAME "/dev/msgq/gsml1_tch_dsp2arm"
#define DEV_TCH_ARM2DSP_NAME "/dev/msgq/gsml1_tch_arm2dsp"
#define DEV_PDTCH_DSP2ARM_NAME "/dev/msgq/gsml1_pdtch_dsp2arm"
#define DEV_PDTCH_ARM2DSP_NAME "/dev/msgq/gsml1_pdtch_arm2dsp"
+#endif
static const char *rd_devnames[] = {
[MQ_SYS_READ] = DEV_SYS_DSP2ARM_NAME,
[MQ_L1_READ] = DEV_L1_DSP2ARM_NAME,
+#ifndef HW_FEMTOBTS
[MQ_TCH_READ] = DEV_TCH_DSP2ARM_NAME,
[MQ_PDTCH_READ] = DEV_PDTCH_DSP2ARM_NAME,
+#endif
};
static const char *wr_devnames[] = {
[MQ_SYS_WRITE] = DEV_SYS_ARM2DSP_NAME,
[MQ_L1_WRITE] = DEV_L1_ARM2DSP_NAME,
+#ifndef HW_FEMTOBTS
[MQ_TCH_WRITE] = DEV_TCH_ARM2DSP_NAME,
[MQ_PDTCH_WRITE]= DEV_PDTCH_ARM2DSP_NAME,
+#endif
};
/* callback when there's something to read from the l1 msg_queue */
@@ -101,8 +105,10 @@ static int l1if_fd_cb(struct osmo_fd *ofd, unsigned int what)
case MQ_SYS_WRITE:
return l1if_handle_sysprim(fl1h, msg);
case MQ_L1_WRITE:
+#ifndef HW_FEMTOBTS
case MQ_TCH_WRITE:
case MQ_PDTCH_WRITE:
+#endif
return l1if_handle_l1prim(fl1h, msg);
default:
/* The compiler can't know that priv_nr is an enum. Assist. */