introduce a command that permits setting the clock source via vty

the default source is the OCXO

5 files changed, 69 insertions, 1 deletions

diff --git a/src/osmo-bts-sysmo/femtobts.c b/src/osmo-bts-sysmo/femtobts.c
index 116d865b..be14b429 100644
--- a/src/osmo-bts-sysmo/femtobts.c
+++ b/src/osmo-bts-sysmo/femtobts.c
@@ -237,3 +237,14 @@ const struct value_string femtobts_tch_pl_names[] = {
 	{ GsmL1_TchPlType_Amr_RatscchData,	"AMR(RATSCCH DATA)" },
 	{ 0, NULL }
 };
+
+const struct value_string femtobts_clksrc_names[] = {
+	{ SF_CLKSRC_NONE,	"None" },
+	{ SF_CLKSRC_OCXO,	"OCXO" },
+	{ SF_CLKSRC_TCXO,	"TCXO" },
+	{ SF_CLKSRC_EXT,	"EXT" },
+	{ SF_CLKSRC_GPS,	"GPS" },
+	{ SF_CLKSRC_TRX,	"TRX" },
+	{ SF_CLKSRC_RX,		"RX" },
+	{ 0, NULL }
+};
diff --git a/src/osmo-bts-sysmo/femtobts.h b/src/osmo-bts-sysmo/femtobts.h
index c4f1af6b..1664d28f 100644
--- a/src/osmo-bts-sysmo/femtobts.h
+++ b/src/osmo-bts-sysmo/femtobts.h
@@ -13,6 +13,16 @@ enum l1prim_type {
 	L1P_T_IND,
 };
 
+/* this should actually be part of the header files */
+enum superfemto_clk_src {
+	SF_CLKSRC_NONE	= 0,
+	SF_CLKSRC_OCXO	= 1,
+	SF_CLKSRC_TCXO	= 2,
+	SF_CLKSRC_EXT	= 3,
+	SF_CLKSRC_GPS	= 4,
+	SF_CLKSRC_TRX	= 5,
+	SF_CLKSRC_RX	= 6,
+};
 
 const enum l1prim_type femtobts_l1prim_type[GsmL1_PrimId_NUM];
 const struct value_string femtobts_l1prim_names[GsmL1_PrimId_NUM+1];
@@ -29,4 +39,6 @@ const struct value_string femtobts_tracef_names[29];
 
 const struct value_string femtobts_tch_pl_names[15];
 
+const struct value_string femtobts_clksrc_names[7];
+
 #endif /* FEMTOBTS_H */
diff --git a/src/osmo-bts-sysmo/l1_if.c b/src/osmo-bts-sysmo/l1_if.c
index 433f0f85..f17926ff 100644
--- a/src/osmo-bts-sysmo/l1_if.c
+++ b/src/osmo-bts-sysmo/l1_if.c
@@ -726,8 +726,11 @@ int l1if_activate_rf(struct femtol1_hdl *hdl, int on)
 		sysp->u.activateRfReq.timing.u8TimSrc = 1; /* Master */
 		sysp->u.activateRfReq.msgq.u8UseTchMsgq = 0;
 		sysp->u.activateRfReq.msgq.u8UsePdtchMsgq = 0;
-		sysp->u.activateRfReq.rfTrx.u8ClkSrc=2;
+		/* Use clock from OCXO or whatever source is configured */
+		sysp->u.activateRfReq.rfTrx.u8ClkSrc = hdl->clk_src;
+		sysp->u.activateRfReq.rfRx.u8ClkSrc = hdl->clk_src;
 		sysp->u.activateRfReq.rfTrx.iClkCor = hdl->clk_cal;
+		sysp->u.activateRfReq.rfRx.iClkCor = hdl->clk_cal;
 #endif
 	} else {
 		sysp->id = SuperFemto_PrimId_DeactivateRfReq;
@@ -860,6 +863,8 @@ struct femtol1_hdl *l1if_open(void *priv)
 
 	fl1h->priv = priv;
 	fl1h->clk_cal = 0xffff;
+	/* default clock source: OCXO */
+	fl1h->clk_src = SF_CLKSRC_OCXO;
 
 	rc = l1if_transport_open(fl1h);
 	if (rc < 0) {
diff --git a/src/osmo-bts-sysmo/l1_if.h b/src/osmo-bts-sysmo/l1_if.h
index a4171505..cbd30b2f 100644
--- a/src/osmo-bts-sysmo/l1_if.h
+++ b/src/osmo-bts-sysmo/l1_if.h
@@ -26,6 +26,7 @@ struct femtol1_hdl {
 	uint32_t hLayer1;			/* handle to the L1 instance in the DSP */
 	uint32_t dsp_trace_f;
 	uint16_t clk_cal;
+	uint8_t clk_src;
 	struct llist_head wlc_list;
 
 	void *priv;			/* user reference */
diff --git a/src/osmo-bts-sysmo/sysmobts_vty.c b/src/osmo-bts-sysmo/sysmobts_vty.c
index 51db434d..e4ecb82b 100644
--- a/src/osmo-bts-sysmo/sysmobts_vty.c
+++ b/src/osmo-bts-sysmo/sysmobts_vty.c
@@ -127,8 +127,45 @@ DEFUN(cfg_trx_clkcal, cfg_trx_clkcal_cmd,
 	return CMD_SUCCESS;
 }
 
+DEFUN(cfg_trx_clksrc, cfg_trx_clksrc_cmd,
+	"clock-source (tcxo|ocxo|ext|gps)",
+	"Set the clock source value\n" "Clock Source value\n")
+{
+	struct gsm_bts_trx *trx = vty->index;
+	struct femtol1_hdl *fl1h = trx_femtol1_hdl(trx);
+	int rc;
+
+	rc = get_string_value(femtobts_clksrc_names, argv[0]);
+	if (rc < 0)
+		return CMD_WARNING;
+
+	fl1h->clk_src = rc;
+
+	return CMD_SUCCESS;
+}
+
 /* runtime */
 
+DEFUN(show_trx_clksrc, show_trx_clksrc_cmd,
+	"show trx <0-0> clock-source",
+	SHOW_TRX_STR "Display the clock source for this TRX")
+{
+	int trx_nr = atoi(argv[0]);
+	struct gsm_bts_trx *trx = gsm_bts_trx_num(vty_bts, trx_nr);
+	struct femtol1_hdl *fl1h;
+
+	if (!trx)
+		return CMD_WARNING;
+
+	fl1h = trx_femtol1_hdl(trx);
+
+	vty_out(vty, "TRX Clock Source: %s%s",
+		get_value_string(femtobts_clksrc_names, fl1h->clk_src),
+		VTY_NEWLINE);
+
+	return CMD_SUCCESS;
+}
+
 DEFUN(show_dsp_trace_f, show_dsp_trace_f_cmd,
 	"show trx <0-0> dsp-trace-flags",
 	SHOW_TRX_STR "Display the current setting of the DSP trace flags")
@@ -265,11 +302,13 @@ int bts_model_vty_init(struct gsm_bts *bts)
 
 	install_element_ve(&show_dsp_trace_f_cmd);
 	install_element_ve(&show_sys_info_cmd);
+	install_element_ve(&show_trx_clksrc_cmd);
 	install_element_ve(&dsp_trace_f_cmd);
 	install_element_ve(&no_dsp_trace_f_cmd);
 
 	install_element(TRX_NODE, &cfg_trx_clkcal_cmd);
 	install_element(TRX_NODE, &cfg_trx_clkcal_def_cmd);
+	install_element(TRX_NODE, &cfg_trx_clksrc_cmd);
 
 	return 0;
 }