diff options
| author | Neels Hofmeyr <nhofmeyr@sysmocom.de> | 2016-01-27 14:20:29 +0100 |
|---|---|---|
| committer | Neels Hofmeyr <nhofmeyr@sysmocom.de> | 2016-01-28 11:45:51 +0100 |
| commit | 9c4f1d6fd020f5f56c10d41c87348d24172f2dd4 (patch) | |
| tree | 79419515d76150be3fec1d4dc4adc58e791b5298 /openbsc/doc/examples/osmo-nitb/nokia/openbsc_nokia_3trx.cfg | |
| parent | 1bf8617610bcba262dc6275efa38541b56494ad4 (diff) | |
fix bsc_vty out: timeslot indented too deeply.
In 'show running-config', timeslot appears as a sub-element of rsl, but it is a
direct child of trx. Fix the timeslot section in vty_out by removing one space
of idention.
Adjust various config examples.
Rationale: it's not relevant for function, but confuses human operators. Fixing
it will save the next hacker some time.
Diffstat (limited to 'openbsc/doc/examples/osmo-nitb/nokia/openbsc_nokia_3trx.cfg')
| -rw-r--r-- | openbsc/doc/examples/osmo-nitb/nokia/openbsc_nokia_3trx.cfg | 144 |
1 files changed, 72 insertions, 72 deletions
diff --git a/openbsc/doc/examples/osmo-nitb/nokia/openbsc_nokia_3trx.cfg b/openbsc/doc/examples/osmo-nitb/nokia/openbsc_nokia_3trx.cfg index f4c715c76..90386bec2 100644 --- a/openbsc/doc/examples/osmo-nitb/nokia/openbsc_nokia_3trx.cfg +++ b/openbsc/doc/examples/osmo-nitb/nokia/openbsc_nokia_3trx.cfg @@ -31,87 +31,87 @@ network max_power_red 24 rsl e1 line 0 timeslot 2 sub-slot full rsl e1 tei 1 - timeslot 0 - phys_chan_config CCCH+SDCCH4 - e1 line 0 timeslot 6 sub-slot full - timeslot 1 - phys_chan_config SDCCH8 - e1 line 0 timeslot 6 sub-slot 1 - timeslot 2 - phys_chan_config TCH/F - e1 line 0 timeslot 6 sub-slot 2 - timeslot 3 - phys_chan_config TCH/F - e1 line 0 timeslot 6 sub-slot 3 - timeslot 4 - phys_chan_config TCH/F - e1 line 0 timeslot 7 sub-slot 0 - timeslot 5 - phys_chan_config TCH/F - e1 line 0 timeslot 7 sub-slot 1 - timeslot 6 - phys_chan_config TCH/F - e1 line 0 timeslot 7 sub-slot 2 - timeslot 7 - phys_chan_config TCH/F - e1 line 0 timeslot 7 sub-slot 3 + timeslot 0 + phys_chan_config CCCH+SDCCH4 + e1 line 0 timeslot 6 sub-slot full + timeslot 1 + phys_chan_config SDCCH8 + e1 line 0 timeslot 6 sub-slot 1 + timeslot 2 + phys_chan_config TCH/F + e1 line 0 timeslot 6 sub-slot 2 + timeslot 3 + phys_chan_config TCH/F + e1 line 0 timeslot 6 sub-slot 3 + timeslot 4 + phys_chan_config TCH/F + e1 line 0 timeslot 7 sub-slot 0 + timeslot 5 + phys_chan_config TCH/F + e1 line 0 timeslot 7 sub-slot 1 + timeslot 6 + phys_chan_config TCH/F + e1 line 0 timeslot 7 sub-slot 2 + timeslot 7 + phys_chan_config TCH/F + e1 line 0 timeslot 7 sub-slot 3 trx 1 arfcn 870 max_power_red 24 rsl e1 line 0 timeslot 3 sub-slot full rsl e1 tei 2 - timeslot 0 - phys_chan_config TCH/F - e1 line 0 timeslot 8 sub-slot 0 - timeslot 1 - phys_chan_config TCH/F - e1 line 0 timeslot 8 sub-slot 1 - timeslot 2 - phys_chan_config TCH/F - e1 line 0 timeslot 8 sub-slot 2 - timeslot 3 - phys_chan_config TCH/F - e1 line 0 timeslot 8 sub-slot 3 - timeslot 4 - phys_chan_config TCH/F - e1 line 0 timeslot 9 sub-slot 0 - timeslot 5 - phys_chan_config TCH/F - e1 line 0 timeslot 9 sub-slot 1 - timeslot 6 - phys_chan_config TCH/F - e1 line 0 timeslot 9 sub-slot 2 - timeslot 7 - phys_chan_config TCH/F - e1 line 0 timeslot 9 sub-slot 3 + timeslot 0 + phys_chan_config TCH/F + e1 line 0 timeslot 8 sub-slot 0 + timeslot 1 + phys_chan_config TCH/F + e1 line 0 timeslot 8 sub-slot 1 + timeslot 2 + phys_chan_config TCH/F + e1 line 0 timeslot 8 sub-slot 2 + timeslot 3 + phys_chan_config TCH/F + e1 line 0 timeslot 8 sub-slot 3 + timeslot 4 + phys_chan_config TCH/F + e1 line 0 timeslot 9 sub-slot 0 + timeslot 5 + phys_chan_config TCH/F + e1 line 0 timeslot 9 sub-slot 1 + timeslot 6 + phys_chan_config TCH/F + e1 line 0 timeslot 9 sub-slot 2 + timeslot 7 + phys_chan_config TCH/F + e1 line 0 timeslot 9 sub-slot 3 trx 2 arfcn 874 max_power_red 24 rsl e1 line 0 timeslot 4 sub-slot full rsl e1 tei 3 - timeslot 0 - phys_chan_config TCH/F - e1 line 0 timeslot 10 sub-slot 0 - timeslot 1 - phys_chan_config TCH/F - e1 line 0 timeslot 10 sub-slot 1 - timeslot 2 - phys_chan_config TCH/F - e1 line 0 timeslot 10 sub-slot 2 - timeslot 3 - phys_chan_config TCH/F - e1 line 0 timeslot 10 sub-slot 3 - timeslot 4 - phys_chan_config TCH/F - e1 line 0 timeslot 11 sub-slot 0 - timeslot 5 - phys_chan_config TCH/F - e1 line 0 timeslot 11 sub-slot 1 - timeslot 6 - phys_chan_config TCH/F - e1 line 0 timeslot 11 sub-slot 2 - timeslot 7 - phys_chan_config TCH/F - e1 line 0 timeslot 11 sub-slot 3 + timeslot 0 + phys_chan_config TCH/F + e1 line 0 timeslot 10 sub-slot 0 + timeslot 1 + phys_chan_config TCH/F + e1 line 0 timeslot 10 sub-slot 1 + timeslot 2 + phys_chan_config TCH/F + e1 line 0 timeslot 10 sub-slot 2 + timeslot 3 + phys_chan_config TCH/F + e1 line 0 timeslot 10 sub-slot 3 + timeslot 4 + phys_chan_config TCH/F + e1 line 0 timeslot 11 sub-slot 0 + timeslot 5 + phys_chan_config TCH/F + e1 line 0 timeslot 11 sub-slot 1 + timeslot 6 + phys_chan_config TCH/F + e1 line 0 timeslot 11 sub-slot 2 + timeslot 7 + phys_chan_config TCH/F + e1 line 0 timeslot 11 sub-slot 3 |